Operating System Multiple Choice Questions on “RTOS”.
1. In real time operating system ____________
a) all processes have the same priority
b) a task must be serviced by its deadline period
c) process scheduling can be done only once
d) kernel is not required
Answer: b
Clarification: None.
2. Hard real time operating system has ______________ jitter than a soft real time operating system.
a) less
b) more
c) equal
d) none of the mentioned
Answer: a
Clarification: Jitter is the undesired deviation from the true periodicity.
3. For real time operating systems, interrupt latency should be ____________
a) minimal
b) maximum
c) zero
d) dependent on the scheduling
Answer: a
Clarification: Interrupt latency is the time duration between the generation of interrupt and execution of its service.
4. In rate monotonic scheduling ____________
a) shorter duration job has higher priority
b) longer duration job has higher priority
c) priority does not depend on the duration of the job
d) none of the mentioned
Answer: a
Clarification: None.
5. In which scheduling certain amount of CPU time is allocated to each process?
a) earliest deadline first scheduling
b) proportional share scheduling
c) equal share scheduling
d) none of the mentioned
Answer: b
Clarification: None.
6. The problem of priority inversion can be solved by ____________
a) priority inheritance protocol
b) priority inversion protocol
c) both priority inheritance and inversion protocol
d) none of the mentioned
Answer: a
Clarification: None.
7. Time duration required for scheduling dispatcher to stop one process and start another is known as ____________
a) process latency
b) dispatch latency
c) execution latency
d) interrupt latency
Answer: b
Clarification: None.
8. Time required to synchronous switch from the context of one thread to the context of another thread is called?
a) threads fly-back time
b) jitter
c) context switch time
d) none of the mentioned
Answer: c
Clarification: None.
9. Which one of the following is a real time operating system?
a) RTLinux
b) VxWorks
c) Windows CE
d) All of the mentioned
Answer: d
Clarification: None.
10. VxWorks is centered around ____________
a) wind microkernel
b) linux kernel
c) unix kernel
d) none of the mentioned
Answer: a
11. Bluetooth operates in which band?
A. ka band
B. l band
C. ku band
D. 2.4 ghz ism band
Answer:D.2.4 ghz ism band
12. Which one of the following offers CPUs as integrated memory or peripheral interfaces?
A. microcontroller
B. microprocessor
C. embedded system
D. memory system
Answer:A.microcontroller
13. Which of the following offers external chips for memory and peripheral interface circuits?
A. microcontroller
B. microprocessor
C. peripheral system
D. embedded system
Answer:B.microprocessor
14. Which one of the following is the successor of 8086 and 8088 processor?
A. 80386
B. 80286
C. 80288
D. 80388
Answer:B.80286
15. Which of the following processor possess memory management?
A. 80286
B. 80386
C. 8086
D. 8088
Answer:A.80286
16. Which of the following is false with respect to UDP?
A. connection-oriented
B. unreliable
C. transport layer protocol
D. low overhead
Answer:A.connection-oriented
17. Beyond IP, UDP provides additional services such as _______
A. routing and switching
B. sending and receiving of packets
C. multiplexing and demultiplexing
D. demultiplexing and error checking
Answer:D.demultiplexing and error checking
18. What is the header size of a UDP packet?
A. 8 bytes
B. 8 bits
C. 16 bytes
D. 124 bytes
Answer:A.8 bytes
19. In TCP, sending and receiving data is done as _______
A. stream of bytes
B. sequence of characters
C. lines of data
D. packets
Answer:A.stream of bytes
20. Communication offered by TCP is ________
A. byte by byte
B. full-duplex
C. half-duplex
D. semi-duplex
Answer:B.full-duplex
21. What kind of socket does an external EPROM to plugged in for prototyping?
A. piggyback
B. single socket
C. multi-socket
D. piggyback reset socket
Answer:A.piggyback
22. Which is the single device capable of providing prototyping support for a range of microcontroller?
A. rom
B. umbrella device
C. otp
D. ram
Answer:B.umbrella device
23. Which of the following can determine if two masters start to use the bus at the same time?
A. counter detect
B. collision detect
C. combined format
D. auto-incremental counter
Answer:B.collision detect
24. Which of the following provides an efficient method for transferring data from a peripheral to memory?
A. dma controller
B. serial port
C. parallel port
D. dual port
Answer:A.dma controller
25. Which among the below stated lines represent the handshaking variant usually and only controlled by the software in the handshaking process?
A. xon/ xoff
B. dcd & gnd
C. txd & rxd
D. all of the above
Answer:A.xon/ xoff
26. What does an IC that initiate or enable the data transfer on bus can be regarded as, in accordance to the I2c protocol specifications?
A. bus slaves
B. bus master
C. bus drivers
D. bus data carriers
Answer:B.bus master
27. ______ is a technology that allows telephone calls to be made over computer networks like the Internet.
A. voip
B. gsm
C. modem
D. cdma
Answer:A.voip
28. Which development tool can facilitate the creation and modification of source programs in addition to assembly and higher -level languages?
A. compiler
B. linker
C. assembler
D. editor
Answer:D.editor
29. Which types of an embedded systems involve the coding at a simple level in an embedded ‘C’, without any necessity of RTOS?
A. sophisticated embedded systems
B. medium scale embedded systems
C. small scale embedded systems
D. all of the above
Answer:C.small scale embedded systems
30. While designing an embedded system, which sub-task oriented process allocates the time steps for various modules that share the similar resources?
A. simulation and validation
B. iteration
C. hardware-software partitioning
D. scheduling
Answer:D.scheduling
31. The step where in the results stored in the temporary register is transferred into the permanent register is called as ______
A. final step
B. commitment step
C. last step
D. inception step
Answer:B.commitment step
32. If an exception is raised and the succeeding instructions are executed completely, then the processor is said to have ______
A. exception handling
B. imprecise exceptions
C. error correction
D. none of the mentioned
Answer:B.imprecise exceptions
33. For applications that demand very high data-processing requirements, or if double precision floating point calculation is needed, then best choice will be
A. cortex-m0 processor
B. cortex-m3 processor
C. cortex-m7 processor
D. cortex-m0+ processor
Answer:C.cortex-m7 processor
34. Which scheme/ strategy is suitable to establish the communication between the access point (AP) and the infrastructure of LANs?
A. non-reception of frame & necessity of retransmission
B. no necessity of working in duplex mode for the host
C. no necessity to prevent the signal fading
D. all of the above
Answer:A.non-reception of frame & necessity of retransmission
35. Unauthorised access of information from a wireless device through a bluetooth connection is called _________
A. bluemaking
B. bluestring
C. bluestring
D. bluesnarfing
Answer:D.bluesnarfing
36. Suppose a TCP connection is transferring a file of 1000 bytes. The first byte is numbered 10001. What is the sequence number of the segment if all data is sent in only one segment?
A. 10001
B. 12001
C. 14000
D. 12002
Answer:A.10001
37. Bytes of data being transferred in each connection are numbered by TCP. These numbers start with a _________
A. fixed number
B. random sequence of 0’s and 1’s
C. one
D. sequence of zero’s and one’s
Answer:D.sequence of zero’s and one’s
38. Which of the following are external pins whose logic state can be controlled by the processor to either be a logic zero or logic one is known as
A. analogue value
B. display values
C. binary values
D. time derived digital outputs
Answer:C.binary values
39. Which of the following has a quadruple buffered receiver and a double buffered transmitter?
A. intel 8250
B. 16450
C. 16550
D. mc68681
Answer:D.mc68681
40. process that is based on IPC mechanism which executes on different systems and can communicate with other processes using message based communication, is called ________
A. local procedure call
B. inter process communication
C. remote procedure call
D. remote machine invocation
Answer:C.remote procedure call
41. Which abstraction level undergo the compilation process by converting a sequential program into finite-state machine and register transfers while designing an embedded system?
A. system
B. behaviour
C. rt
D. logic
Answer:B.behaviour
42. Which characteristics of an embedded system exhibit the responsiveness to the assortments or variations in system’s environment by computing specific results for real-time applications without any kind of postponement ?
A. single-functioned characteristic
B. tightly-constraint characteristics
C. reactive & real time characteristics
D. all of the above
Answer:C.reactive & real time characteristics
43. Which potential mode of operation indicate the frequent sending of byte to the slave corresponding to the reception of an acknowledge signal when it becomes desirable for the master to write to the slave during data transmission in I2C bus?
A. master in master-transmit mode & slave in slave-receive mode
B. slave in slave-transmit mode & master in master-receive mode
C. master in master-transmit mode as well as master-receive mode
D. slave in slave-transmit mode as well as slave-receive mode
Answer:A.master in master-transmit mode & slave in slave-receive mode
44. Which method of multiple secondary communication in TDMA is acquired/adopted by bluetooth especially where data integrity becomes more crucial than avoiding latency?
A. synchronous connection-oriented (sco) link
B. asynchronous connectionless link (acl)
C. both a & b
D. none of the above
Answer:B.asynchronous connectionless link (acl)
45. The upper 128 bytes of an internal data memory from 80H through FFH usually represent ___________.
A. general-purpose registers
B. special function registers
C. stack pointers
D. program counters
Answer:B.special function registers
46. Which standard govern parallel communications?
A. RS232
B. RS-232a
C. CAT 5
D. IEEE 1284
Answer:D.IEEE 1284
47. Which common bus specification provides the fastest data transfer rate?
A. VL bus
B. ISA
C. PCI
D. All of the above
Answer:C.PCI
48. Devices that use the ____ bus are self-configuring.
A. EISA
B. ISA
C. MCA
D. PCI
Answer:D.PCI
49. Which of following is not a valid bus in computer system ?
A. Data Bus
B. Memory Bus
C. Address Bus
D. System Bus
Answer:B.Memory Bus
50. The AT bus is also known as the ____ bus.
A. 286
B. 8-bit ISA
C. 16-bit ISA
D. ISA
Answer:C.16-bit ISA
51. The PCI follows a set of standards primarily used in _____ PC’s.
A. intel
B. motorola
C. sun
D. IBM
Answer:D.IBM
52. How may standard levels of interrupts are provided on the 8-bit ISA bus (XT-class computer)?
A. 4
B. 8
C. 12
D. 16
Answer:B.8
53. The acronym HDI stands for:The acronym HDI stands for:
A. Half duplex interface
B. Hard disk
C. Hard disk interface
D. Help desk interference
Answer:C.Hard disk interface
54. Bus which used to connect the monitor to the CPU is
A. PCI bus
B. SCSI bus
C. memory bus
D. rambus
Answer:B.SCSI bus
55. Bus which is used to connect Macintosh keyboards and mouse is
A. USB
B. FireWire
C. SCSI
D. ISA
Answer:A.USB
56. The device which starts data transfer is called __________
A. Master
B. Transactor
C. Distributor
D. Initiator
Answer:D.Initiator
57. The method which offers higher speeds of I/O transfers is ___________
A. Memory mapping
B. Interrupts
C. Program-controlled I/O
D. DMA
Answer:D.DMA
58. The asynchronous BUS mode of transmission allows for a faster mode of data transfer.
A. true
B. false
Answer:B.false
59. ______ is used as an intermediate to extend the processor BUS.
A. Bridge
B. Router
C. Gateway
D. Connector
Answer:A.Bridge
60. ________ is an extension of the processor BUS.
A. SCSI BUS
B. USB
C. PCI BUS
D. None of the mentioned
Answer:C.PCI BUS
61. The system developed by IBM with ISA architecture is ______
A. SPARK
B. SUN-SPARK
C. PC-AT
D. None of the mentioned
Answer:C.PC-AT
62. The best mode of connection between devices which need to send or receive large amounts of data over a short distance is _____
A. Bus
B. Serial Port
C. Parallel port
D. Isochronous port
Answer:C.Parallel port
63. The device which is allowed to initiate data transfers on the BUS at any time is called _____
A. Bus Master
B. Processor
C. Controller
D. BUS arbitrator
Answer:A.Bus Master
64. The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready is?
A. Signal handling
B. Exception
C. Interrupts
D. DMA
Answer:C. Interrupts
65. The PCI BUS supports _____ address space/s.
A. I/O
B. Memory
C. Configuration
D. All of the mentioned
Answer:D.All of the mentioned
66. The _________ present a uniform device-access interface to the I/O subsystem, much as system calls provide a standard interface between the application and the operating system.
A. Devices
B. Buses
C. Device drivers
D. I/O systems
Answer:C.Device drivers
67. An I/O port typically consists of four registers status, control, ________ and ________ registers.
A. system in, system out
B. data in, data out
C. flow in, flow out
D. input, output
Answer:B.data in, data out
68. The CPU hardware has a wire called __________ that the CPU senses after executing every instruction.
A. interrupt request line
B. interrupt bus
C. interrupt receive line
D. interrupt sense line
Answer:A.interrupt request line
69. The _________ determines the cause of the interrupt, performs the necessary processing and executes a return from the interrupt instruction to return the CPU to the execution state prior to the interrupt.
A. interrupt request line
B. device driver
C. interrupt handler
D. All of Above
Answer:C.interrupt handler
70. The usual BUS structure used to connect the I/O devices is ___________
A. Star BUS structure
B. Multiple BUS structure
C. Single BUS structure
D. Node to Node BUS structure
Answer:C.Single BUS structure
71. The method of accessing the I/O devices by repeatedly checking the status flags is ___________
A. Memory-mapped I/O
B. Program-controlled I/O
C. I/O mapped
D. None of the mentioned
Answer:B.Program-controlled I/O
72. The classification of BUSes into synchronous and asynchronous is based on __________
A. The devices connected to them
B. The type of data transfer
C. The Timing of data transfers
D. None of the mentioned
Answer:C.The Timing of data transfers
73. In synchronous BUS, the devices get the timing signals from __________
A. Timing generator in the device
B. A common clock line
C. The Timing of data transfers
D. None of the mentioned
Answer:B.A common clock line
74. The asynchronous BUS mode of transmission allows for a faster mode of data transfer.
A. true
B. false
Answer:B.false
75. The use of spooler programs or _______ Hardware allows PC operators to do the processing work at the same time a printing operation is in progress.
A. Register
B. memory
C. Buffer
D. Cpu
Answer:B.memory
76. What is the full form of ISA?
A. Industry Standard Architecture
B. International American Standard
C. International Standard Architecture
D. None of the mentioned
Answer:A.Industry Standard Architecture
77. The disadvantage of using a parallel mode of communication is ______
A. All of the mentioned
B. Leads to erroneous data transfer
C. Security of data
D. It is costly
Answer:D.It is costly
78. The transformation between the Parallel and serial ports is done with the help of ______
A. Flip flops
B. Logic circuits
C. Shift registers
D. None of the mentioned
Answer:C.Shift registers
79. What WLAN device provides communications management services to wireless workstations?
A. Access Point
B. Antenna
C. Network Adaptor
D. Repeater
Answer:A.Access Point
80. RS-232, RS-449, RS-530, V-24, and X-21 are examples of?
A. standards for various types of transmission channels.
B. standards for interfaces between terminals and modems.
C. two methods of error detection and correction
D. standards for end-to-end performance of data communication systems.
Answer:B.standards for interfaces between terminals and modems.
81. Many cables have “RS-232” connectors with some wires crossed or connected to each other because….
A. there are various RS-232 standards.
B. asynchronous modem reverses the direction of transmitted and received data from the standard.
C. accept commands from the terminals Via Rs-232 interface.
D. many computers and peripherals use RS-232 serial interfaces, but not as DTE-to-DCE
Answer:D.many computers and peripherals use RS-232 serial interfaces, but not as DTE-to-DCE
82. Which protocol standard of serial communication specify the bi-directional and half-duplex form of data transmission by allowing various numbers of drivers and receivers in bus configuration?
A. RS232
B. RS2485
C. RS422
D. RS423
Answer:B.RS2485
83. What is the maximum device handling capacity of serial standard protocol RS485 in terms of drivers and receivers on a single line?
A. 8
B. 10
C. 16
D. 32
Answer:D.32
84. The main importance of ARM micro-processors is providing operation with ______
A. Low cost and low power consumption
B. Higher degree of multi-tasking
C. Lower error or glitches
D. Efficient memory management
Answer:A.Low cost and low power consumption
85. The address system supported by ARM systems is/are ___________
A. Little Endian
B. Big Endian
C. X-Little Endian
D. Both Little & Big Endian
Answer:D.Both Little & Big Endian
86. Which of the following is the type of SPI controller?
A. Queued SPI
B. Microwire
C. Microwire/plus
D. Quad SPI
Answer:A.Queued SPI
87. How buffers are enabled in the parallel ports?
A. by the data register
B. by data direction register
C. by individual control register
D. by data and individual control register
Answer:B.by data direction register
88. Which peripheral port provides the FASTEST throughput to laser printers?
A. RS-232
B. SCSI
C. Parallel
D. Serial
Answer:C.Parallel
89. Advantages of SPI are…..
A. It\s faster than asynchronous serial.
B. The receive hardware can be a simple shift register.
C. It supports multiple slaves.
D. All of Above
Answer:D.All of Above
90. In a safety critical system, incorrect operation ____________
A. does not affect much
B. causes minor problems
C. causes major and serious problems
D. none of the mentioned
Answer:C.causes major and serious problems
91. Antilock brake systems, flight management systems, pacemakers are examples of ____________
A. safety critical system
B. hard real time system
C. soft real time system
D. safety critical system and hard real time system
Answer:D.safety critical system and hard real time system
92. Some of the properties of real time systems include ____________
A. single purpose
B. inexpensively mass produced
C. small size
D. all of the mentioned
Answer:D.all of the mentioned
93. The technique in which the CPU generates physical addresses directly is known as ____________
A. relocation register method
B. real addressing
C. virtual addressing
D. none of the mentioned
Answer:B.real addressing
94. Hard real time operating system has ______________ jitter than a soft real time operating system.
A. less
B. more
C. equal
D. none of the mentioned
Answer:A.less
95. In rate monotonic scheduling ____________
A. shorter duration job has higher priority
B. longer duration job has higher priority
C. priority does not depend on the duration of the job
D. none of the mentioned
Answer:A.shorter duration job has higher priority
96. In which scheduling certain amount of CPU time is allocated to each process?
A. earliest deadline first scheduling
B. proportional share scheduling
C. equal share scheduling
D. none of the mentioned
Answer:B.proportional share scheduling
97. Time duration required for scheduling dispatcher to stop one process and start another is known as ____________
A. process latency
B. dispatch latency
C. execution latency
D. interrupt latency
Answer:B.dispatch latency
98. Time required to synchronous switch from the context of one thread to the context of another thread is called?
A. threads fly-back time
B. jitter
C. context switch time
D. none of the mentioned
Answer:C.context switch time
99. Which one of the following is a real time operating system?
A. RTLinux
B. VxWorks
C. Windows CE
D. All of the mentioned
Answer:D.All of the mentioned
100. VxWorks is centered around ___________
A. wind microkernel
B. linux kernel
C. unix kernel
D. none of the mentioned
Answer:A.wind microkernel
101. Preemptive, priority based scheduling guarantees ____________
A. hard real time functionality
B. soft real time functionality
C. protection of memory
D. none of the mentioned
Answer:B.soft real time functionality
102. What is Event latency?
A. the amount of time an event takes to occur from when the system started
B. the amount of time from the event occurrence till the system stops
C. the amount of time from event occurrence till the event crashes
D. the amount of time that elapses from when an event occurs to when it is serviced.
Answer:D.the amount of time that elapses from when an event occurs to when it is serviced.
103. Real time systems need to __________ the interrupt latency.
A. minimize
B. maximize
C. not bother about
D. none of the mentioned
Answer:A.minimize
104. The amount of time required for the scheduling dispatcher to stop one process and start another is known as ______________
A. event latency
B. interrupt latency
C. dispatch latency
D. context switch
Answer:C.dispatch latency
105. The most effective technique to keep dispatch latency low is to ____________
A. provide non preemptive kernels
B. provide preemptive kernels
C. make it user programmed
D. run less number of processes at a time
Answer:B.provide preemptive kernels
106. Antilock brake systems, flight management systems, pacemakers are examples of
A. safety critical system
B. hard real time system
C. soft real time system
D. safety critical system and hard real time system
Answer:D.safety critical system and hard real time system
107. In real time operating system ____________
A. all processes have the same priority
B. a task must be serviced by its deadline period
C. process scheduling can be done only once
D. kernel is not required
Answer:B.a task must be serviced by its deadline period
108. In a real time system the computer results ____________
A. must be produced within a specific deadline period
B. may be produced at any time
C. may be correct
D. all of the mentioned
Answer:A.must be produced within a specific deadline period
109. . If there are a total of T = 100 shares to be divided among three processes, A, B and C. A is assigned 50 shares, B is assigned 15 shares and C is assigned 20 shares.B will have ______ percent of the total processor time.
A. 20
B. 15
C. 50
D. none of the mentioned
Answer:B.15
110. Earliest deadline first algorithm assigns priorities according to ____________
A. periods
B. deadlines
C. burst times
D. none of the mentioned
Answer:B.deadlines
111. A process P1 has a period of 50 and a CPU burst of t1 = 25, P2 has a period of 80 and a CPU burst of 35. The total CPU utilization is ____________
A. 0.90
B. 0.74
C. 0.94
D. 0.80
Answer:C.0.94
112. A process P1 has a period of 50 and a CPU burst of t1 = 25, P2 has a period of 80 and a CPU burst of 35., the priorities of P1 and P2 are?
A. remain the same throughout
B. keep varying from time to time
C. may or may not be change
D. none of the mentioned
Answer:B.keep varying from time to time
113. A process P1 has a period of 50 and a CPU burst of t1 = 25, P2 has a period of 80 and a CPU burst of 35., can the two processes be scheduled using the EDF algorithm without missing their respective deadlines?
A. Yes
B. No
C. Maybe
D. None of the mentioned
Answer:A.Yes
114. Using EDF algorithm practically, it is impossible to achieve 100 percent utilization due to __________
A. the cost of context switching
B. interrupt handling
C. power consumption
D. all of the mentioned
Answer:A.the cost of context switching
115. If there are a total of T = 100 shares to be divided among three processes, A, B and C. A is assigned 50 shares, B is assigned 15 shares and C is assigned 20 shares.A will have ______ percent of the total processor time.
A. 20
B. 15
C. 50
D. none of the mentioned
Answer:C.50
116. If there are a total of T = 100 shares to be divided among three processes, A, B and C. A is assigned 50 shares, B is assigned 15 shares and C is assigned 20 shares.C will have ______ percent of the total processor time.
A. 20
B. 15
C. 50
D. none of the mentioned
Answer:A.20
117. If there are a total of T = 100 shares to be divided among three processes, A, B and C. A is assigned 50 shares, B is assigned 15 shares and C is assigned 20 shares.If a new process D requested 30 shares, the admission controller would __________
A. allocate 30 shares to it
B. deny entry to D in the system
C. all of the mentioned
D. none of the mentioned
Answer:B.deny entry to D in the system
118. . In a real time system the computer results ____________
A. must be produced within a specific deadline period
B. may be produced at any time
C. may be correct
D. all of the mentioned
Answer:A.must be produced within a specific deadline period
119. In a safety critical system, incorrect operation ____________
A. does not affect much
B. causes minor problems
C. causes major and serious problems
D. none of the mentioned
Answer:C.causes major and serious problems
120. . The amount of memory in a real time system is generally ____________
A. less compared to PCs
B. high compared to PCs
C. same as in PCs
D. they do not have any memory
Answer:A.less compared to PCs
121. What is the priority of a real time task?
A. must degrade over time
B. must not degrade over time
C. may degrade over time
D. none of the mentioned
Answer:B.must not degrade over time
122. Memory management units ____________
A. increase the cost of the system
B. increase the power consumption of the system
C. increase the time required to complete an operation
D. all of the mentioned
Answer:D.all of the mentioned
123. A process P1 has a period of 50 and a CPU burst of t1 = 25, P2 has a period of 80 and a CPU burst of 35. Can the processes be scheduled without missing the deadlines?
A. Yes
B. No
C. Maybe
D. None of the mentioned
Answer:B.No
124. Type of processor in which single task of a particular application is process is termed as Select one:
A. a. real time processor
B. b. dedicated processor
C. c. applicant processor
D. d. one task processor
Answer:B.b. dedicated processor
125. Calculate the idle time of the processor with 3 periodic tasks whose execution times are given as 1, 1, and 3, and their periods are 3, 4, and 10. Select one: 17% 12% 88%
A. 0.17
B. 0.12
C. 0.88
D. 1
Answer:B.0.12
126. In rate monotonic scheduling algorithm Select one:
A. shorter duration job has higher priority,
B. longer duration job has higher priority
C. priority does not depend on the duration of the job
D. none of the mentioned
Answer:B.longer duration job has higher priority
127. Tasks whose execution would begin randomly and within the interval of arrival times of consecutive tasks is known as
A. Periodic Task
B. Aperiodic Task
C. Sporadic Task
D. none of the mentioned
Answer:C.Sporadic Task
128. What is True for a task vis-à-vis a process?
A. Tasks are complex compared to processes
B. Tasks represent only a single sequence of instructions
C. Processes can spawn threads but tasks cannot spawn tasks Tasks and processes are one and the same thing
D. Tasks and processes are one and the same thing
Answer:B.Tasks represent only a single sequence of instructions
129. What does the utilization rate tells us? Select one:
A. If it is larger or equal to 1, the system is not feasible
B. If it is smaller than 1, the system is feasible
C. If it is exactly 1, the system is feasible
D. if there is no context switch overhead If it is 0, the system is absolutely feasible
Answer:A.If it is larger or equal to 1, the system is not feasible
130. if jobs have unpredictable release times, a task is termed :
A. aperiodic
B. sporadic periodic.
C. both
D. None of these
Answer:A.aperiodic
131. What is TRUE for an aperiodic task and a sporadic task:
A. A sporadic task and an aperiodic task are one and the same thing
B. An aperiodic task occurs randomly and has hard real time requirements
C. A sporadic task occurs randomly and has hard real time requirements
D. A sporadic task becomes aperiodic when it is executed with a periodic task
Answer:C.A sporadic task occurs randomly and has hard real time requirements
132. State whether the following statements are True or False for the features of real time operating system.i) fast process or thread switch ii) ability to respond to external interrupts quickly. iii) minimization of intervals during which interrupts are enabled. iv) preemptive scheduling based on priority
A. i, ii and iii only
B. ii, iii and iv only
C. i, ii and iv only
D. All i, ii, iii and iv
Answer:C.i, ii and iv only
133. Effective release time of a job without the predecessors is equal to its given …………….
A. release time
B. Deadline
C. both
D. None of these
Answer:A.release time
134. Effective release time of a job with predecessors is equal to the maximum value among, its…………and…………..
A. deadline time and effective release time of all of the predecessors.
B. release time and effective release time of all of the predecessors.
C. both
D. None of these
Answer:B. release time and effective release time of all of the predecessors.
135. Effective deadline of job without the successor is equal to its given ……………
A. release time
B. Deadline
C. both
D. None of these
Answer:B.Deadline
136. Effective deadline of job with successor is equal tothe minimum value among its deadlines and …………………………
A. only deadline of job
B. Release time of all the successors
C. deadlines of all the successors
D. None of these
Answer:C.deadlines of all the successors
137. LRT schedules all the job backward from …………………… of all the job in priority driven manner to the current time.
A. Earliest deadline
B. latest deadline
C. latest releasetime
D. None of these
Answer:B.latest deadline
138. In on-line scheduling, scheduler make the schedule ……………………… that will be released in future.
A. with the knowledge of the jobs
B. without the knowledge of the jobs
C. both
D. None of these
Answer:B.without the knowledge of the jobs
139. 5. In which scheduling certain amount of CPU time is allocated to each process?
A. earliest deadline first scheduling
B. proportional share scheduling
C. equal share scheduling
D. none of the mentioned
Answer:B.proportional share scheduling
140. Time duration required for scheduling dispatcher to stop one process and start another is known as ____________
A. process latency
B. dispatch latency
C. execution latency
D. interrupt latency
Answer:B.dispatch latency
141. Scheduling of tasks is a very important consideration in RTOS. Which of the following best described the scheduling policy design:
A. The scheduler must follow a pre-emptive policy
B. The scheduler must not use pre-emptive policy option
C. The scheduler must not only use pre-emptive policy options with the priority considerations.
D. The scheduler must not use pre-emptive policy option, but must employ priority consideration.
Answer:D.d. The scheduler must not use pre-emptive policy option, but must employ priority consideration.
142. Preemptive, priority based scheduling guarantees ____________
A. hard real time functionality
B. soft real time functionality
C. protection of memory
D. none of the mentioned
Answer:B.soft real time functionality