Category: Digital Circuits Objective Questions

Digital Electronics/Circuits Multiple Choice Questions on “Read Only Memory (ROM) – 1”.

1. Which of the following has the capability to store the information permanently?
A. RAM
B. ROM
C. Storage cells
D. Both RAM and ROM
Answer: B
Clarification: ROM (Read Only Memory) has the capability to store the information permanently. RAM provides random access to memory. Storage cells are responsible for the transfer of data from and into the memory.

2. ROM has the capability to perform _____________
A. Write operation only
B. Read operation only
C. Both write and read operation
D. Erase operation
Answer: B
Clarification: ROM means “Read Only Memory”. Hence, it has the capability to perform read operation only. No write or erase operation could be performed in the ROM.

3. Since, ROM has the capability to read the information only then also it has been designed, why?
A. For controlling purpose
B. For loading purpose
C. For booting purpose
D. For erasing purpose
Answer: C
Clarification: ROM means “Read Only Memory”. Hence, it has capability to perform read operation only. No write or erase operation could be performed in the ROM. It has designed to provide the computer with resident programmes and for booting purpose.

4. The ROM is a ___________
A. Sequential circuit
B. Combinational circuit
C. Magnetic circuit
D. Static circuit
Answer: B
Clarification: ROM is a combination of different ICs. So, it is a combinational circuit. It depends on present input and not past states.

5. ROM is made up of ___________
A. NAND and OR gates
B. NOR and decoder
C. Decoder and OR gates
D. NAND and decoder
Answer: C
Clarification: ROM (Read Only Memory) has the capability to store the information permanently. ROM is made up of decoder and OR gates within a single IC package.

6. Why are ROMs called non-volatile memory?
A. They lose memory when power is removed
B. They do not lose memory when power is removed
C. They lose memory when power is supplied
D. They do not lose memory when power is supplied
Answer: B
Clarification: Volatile memory stores data as long as it is powered. ROMs are called non-volatile memory because of they do not lose memory when power is removed.

7. In ROM, each bit is a combination of the address variables is called ___________
A. Memory unit
B. Storage class
C. Data word
D. Address
Answer: D
Clarification: In ROM, each bit combination that comes out of the output lines is called data word. Usually, a word consists of 16-bits or 2-bytes.

8. Which is not a removable drive?
A. Zip
B. Hard disk
C. Super Disk
D. Jaz
Answer: C
Clarification: Hard disk is present inside a computer. So, it is not a removable drive.

9. In ROM, each bit combination that comes out of the output lines is called ___________
A. Memory unit
B. Storage class
C. Data word
D. Address
Answer: C
Clarification: In ROM, each bit combination that comes out of the output lines is called data word. Usually, a word consists of 16-bits or 2-bytes.

10. VLSI chip utilizes ___________
A. NMOS
B. CMOS
C. BJT
D. All of the Mentioned
Answer: D
Clarification: Very Large Scale Integration (VLSI) (ranging from 10,000 to 100,000 gates per IC. is a memory chip which is made up of NMOS, CMOS, BJT, and BiCMOS.

Digital Electronics/Circuits Multiple Choice Questions on “Karnaugh Map”.

1. A Karnaugh map (K-map) is an abstract form of ____________ diagram organized as a matrix of squares.
A. Venn Diagram
B. Cycle Diagram
C. Block diagram
D. Triangular Diagram
Answer: A
Clarification: A Karnaugh map (K-map) is an abstract form of Venn diagram organized as a matrix of squares, where each square represents a Maxterm or a Minterm.

2. There are ______ cells in a 4-variable K-map.
A. 12
B. 16
C. 18
D. 8
Answer: B
Clarification: There are 16 = (2⁴) cells in a 4-variable K-map.

3. The K-map based Boolean reduction is based on the following Unifying Theorem: A + A’ = 1.
A. Impact
B. Non Impact
C. Force
D. Complementarity
Answer: B
Clarification: The given expression A +A’ = 1 is based on non-impact unifying theorem.

4. Each product term of a group, w’.x.y’ and w.y, represents the ____________ in that group.
A. Input
B. POS
C. Sum-of-Minterms
D. Sum of Maxterms
Answer: C
Clarification: In a minterm, each variable w, x or y appears once either as the variable itself or as the inverse. So, the given expression satisfies the property of Sum of Minterm.

5. The prime implicant which has at least one element that is not present in any other implicant is known as ___________
A. Essential Prime Implicant
B. Implicant
C. Complement
D. Prime Complement
Answer: A
Clarification: Essential prime implicants are prime implicants that cover an output of the function that no combination of other prime implicants is able to cover.

6. Product-of-Sums expressions can be implemented using ___________
A. 2-level OR-AND logic circuits
B. 2-level NOR logic circuits
C. 2-level XOR logic circuits
D. Both 2-level OR-AND and NOR logic circuits
Answer: D
Clarification: Product-of-Sums expressions can be implemented using 2-level OR-AND & NOR logic circuits.

7. Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given ___________
A. Function
B. Value
C. Set
D. Word
Answer: A
Clarification: Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given function.

8. Don’t care conditions can be used for simplifying Boolean expressions in ___________
A. Registers
B. Terms
C. K-maps
D. Latches
Answer: C
Clarification: Don’t care conditions can be used for simplifying Boolean expressions in K-maps which helps in pairing with 1/0.

9. It should be kept in mind that don’t care terms should be used along with the terms that are present in ___________
A. Minterms
B. Expressions
C. K-Map
D. Latches
Answer: A
Clarification: It should be kept in mind that don’t care terms should be used along with the terms that are present in minterms as well as maxterms which reduces the complexity of the boolean expression.

10. Using the transformation method you can realize any POS realization of OR-AND with only.
A. XOR
B. NAND
C. AND
D. NOR
Answer: D
Clarification: Using the transformation method we can realize any POS realization of OR-AND with only NOR.

11. There are many situations in logic design in which simplification of logic expression is possible in terms of XOR and _________________ operations.
A. X-NOR
B. XOR
C. NOR
D. NAND
Answer: A
Clarification: There are many situations in logic design in which simplification of logic expression is possible in terms of XOR and XNOR operations.
Expression of XOR : AB’ + A’B
Expression of XNOR : AB + A’B’

12. These logic gates are widely used in _______________ design and therefore are available in IC form.
A. Sampling
B. Digital
C. Analog
D. Systems
Answer: B
Clarification: These logic gates(XOR, XNOR, NOR) are widely used in digital design and therefore are available in IC form as digital circuits deal with data transmission in the form of binary digits.

13. In case of XOR/XNOR simplification we have to look for the following _______________
A. Diagonal Adjacencies
B. Offset Adjacencies
C. Straight Adjacencies
D. Both diagonal and offset adjencies
Answer: D
Clarification: In case of XOR/XNOR simplification we have to look for the following diagonal and offset adjacencies. XOR gives output 1 when odd number of 1s are present in input while XNOR gives output 1 when even number of 1s or all 0s are present in input.

14. Entries known as _______________ mapping.
A. Diagonal
B. Straight
C. K
D. Boolean
Answer: A
Clarification: Entries known as diagonal mapping. The diagonal mapping holds true when for any relation, there is a projection of product on the factor.

Digital Electronics/Circuits Multiple Choice Questions on “Introduction of Arithmetic Operation”.

1. The basic building blocks of the arithmetic unit in digital computers are __________
A. Subtractors
B. Adders
C. Multiplexer
D. Comparator
Answer: B
Clarification: The basic building blocks of the arithmetic unit in digital computers are adders. Since a parallel adder is constructed with a number of full-adder circuits connected in cascade. By controlling the data inputs to the parallel adder, it is possible to obtain different types of arithmetic operations.

2. A digital system consists of _____ types of circuits.
A. 2
B. 3
C. 4
D. 5
Answer: A
Clarification: A digital system consists of two types of circuits and these are a combinational and sequential logic circuit. Combinational circuits are the ones which do not depend on previous inputs while Sequential circuits depend on past inputs.

3. In a combinational circuit, the output at any time depends only on the _______ at that time.
A. Voltage
B. Intermediate values
C. Input values
D. Clock pulses
Answer: C
Clarification: In a combinational circuit, the output at any time depends only on the input values at that time and not on past or intermediate values.

4. In a sequential circuit, the output at any time depends only on the input values at that time.
A. Past output values
B. Intermediate values
C. Both past output and present input
D. Present input values
Answer: C
Clarification: In a sequential circuit, the output at any time depends on the present input values as well as past output values. It also depends on clock pulses depending on whether it’s synchronous or asynchronous sequential circuits.

5. Procedure for the design of combinational circuits are:

A. From the word description of the problem, identify the inputs and outputs and draw a block diagram.
B. Draw the truth table such that it completely describes the operation of the circuit for different 
combinations of inputs.
C. Simplify the switching expression(s) for the output(s).
D. Implement the simplified expression using logic gates.
E. Write down the switching expression(s) for the output(s).

A. B, C, D, E, A
B. A, D, E, B, C
C. A, B, E, C, D
D. B, A, E, C, D
Answer: C
Clarification: Combinational circuits are the ones which do not depend on previous inputs and depends only on the present values. The given arrangement A, B, E, C, D is the right sequence for the designing of the combinational circuits.

6. All logic operations can be obtained by means of __________
A. AND and NAND operations
B. OR and NOR operations
C. OR and NOT operations
D. NAND and NOR operations
Answer: D
Clarification: Since the logic gates NOR and NAND are known as universal logic gates, therefore it can be used to design all the three basic gates AND, OR and NOT. Thus, it means that any operations can be obtained by implementation of these gates.

7. The design of an ALU is based on __________
A. Sequential logic
B. Combinational logic
C. Multiplexing
D. De-Multiplexing
Answer: B
Clarification: The design of an ALU is based on combinational logic. Because the unit has a regular pattern, it can be broken into identical stages connected in cascade through carries.

8. If the two numbers are unsigned, the bit conditions of interest are the ______ carry and a possible _____ result.
A. Input, zero
B. Output, one
C. Input, one
D. Output, zero
Answer: D
Clarification: If the two numbers are unsigned, the bit conditions of interest are the output carry and a possible zero result.

9. If the two numbers include a sign bit in the highest order position, the bit conditions of interest are the sign of the result, a zero indication and __________
A. An underflow condition
B. A neutral condition
C. An overflow condition
D. One indication
Answer: C
Clarification: If the two numbers include a sign bit in the highest order position, the bit conditions of interest are the sign of the result, a zero indication and an overflow condition.

10. The flag bits in an ALU is defined as ___________
A. The total number of registers
B. The status bit conditions
C. The total number of control lines
D. All of the Mentioned
Answer: B
Clarification: In an ALU, status bit conditions are sometimes called condition code bits or flag bits. It is so called because they tend to represent the status of the respect flags after any operation.

Digital Electronics/Circuits Multiple Choice Questions on “Counter ICs”.

1. What is the difference between a 7490 and a 7493?
A. 7490 is a MOD-10, 7493 is a MOD-16
B. 7490 is a MOD-16, 7493 is a MOD-10
C. 7490 is a MOD-12, 7493 is a MOD-16
D. 7490 is a MOD-10, 7493 is a MOD-12
Answer: A
Clarification: The difference between a 7490 and a 7493 is that 7490 is a MOD-10, 7493 is a MOD-16 counter. Thus, 7490 traverses 10 states and 7493 traverses 16 states.

2. How many different states does a 2-bit asynchronous counter have?
A. 1
B. 4
C. 2
D. 8
Answer: B
Clarification: For a n-bit counter, total number of states = 2ⁿ. Thus, for 2-bit counter, total number of states = 2² = 4.

3. A 12 MHz clock frequency is applied to a cascaded counter containing a modulus-5 counter, a modulus-8 counter, and a modulus-10 counter. The lowest output frequency possible is ________
A. 10 kHz
B. 20 kHz
C. 30 kHz
D. 60 kHz
Answer: C
Clarification: Cascaded counter containing a modulus-5 counter, a modulus-8 counter, and a modulus-10 counter. So, 5*8*10=400. Applied clock frequency = 12 MHz; hence, the lowest output frequency possible is 12MHz/400=30 kHz.

4. Which one is a 4-bit binary ripple counter?
A. IC 7493
B. IC 7490
C. IC 7491
D. IC 7492
Answer: B
Clarification: IC 7493 is a 4-bit binary ripple counter. It is a MOD-16 counter with 2⁴ = 16 states.

5. IC 7493 consist of ____________
A. 4 S-R flip-flop
B. 4 J-K flip-flop
C. 4 master-slave flip-flop
D. 4 D flip-flop
Answer: C
Clarification: IC 7493 consist of 4 J-K master-slave flip-flop. It is a MOD-16 counter with 2⁴ = 16 states.