Category: Linear Integrated Circuits Objective Questions

Linear Integrated Circuit test on “Basic Planar Process – 3”.

1. The major disadvantage of PN-junction isolation technique is:
A. Formation of Parasitic Resistance
B. Formation of Parasitic Capacitance
C. Formation of Isolation island
D. None of the mentioned

Answer: B
Clarification: The presence of Parasitic Capacitance at the isolating PN-junction, results in an inevitable capacitor coupling between the component and substrate. This also limits the performance of circuit at high frequencies.

2. Which isolation technique is used in applications like military and aeroscope?
A. Thin film isolation
B. PN-junction isolation
C. Barrier isolation
D. Dielectric isolation

Answer: D
Clarification: In dielectric isolation a layer of solid dielectric is used for isolation purpose. This layer is thick enough such that its associated capacitance is negligible. Moreover, it is more expensive, which is justified by its superior performance.

3. Pick out the incorrect statement
Aluminium is usually used for metallization of most IC as it offers
A. Relatively a good conductor
B. High resistance
C. Good mechanical bond with silicon
D. Deposition of aluminium film using vacuum deposition

Answer: C
Clarification: Aluminium forms low resistance (it is a good conductor of electricity). Therefore, it forms ohmic contact (Semiconductor-metal contact) with p-type silicon and heavily doped n-type silicon.

4. How the aluminium film coating is carried out in metallization process?
A. Heating and pouring aluminium in required place.
B. Aluminium is vacuum evaporated and then condensed
C. Placing the aluminium in required place and then heating it using tungsten
D. None of the mentioned

Answer: B
Clarification: Metallization process takes place in Vacuum evaporation chamber, where the material is evaporated by focussing a high power density electron beam. Vapours then hit the substrate and get condensed to form thin film coating.

5. What type of packing is suitable for Integrated Circuits?
A. Metal can package
B. Dual-in-line package
C. Ceramic flat package
D. All of the mentioned

Answer: D
Clarification: These packages are the three different possible packages available in Integrated Circuits. Its usage depends upon the number of leads required for application.

6. Metal can IC packages are available in
A. 42 leads
B. 16 leads
C. 12 leads
D. 24 leads

Answer: C
Clarification: The maximum lead available in a metal can IC package is 12. The remaining lead numbers are commonly available in dual-in-line packages.

7. What process is used in semiconductor industry to fabricate Integrated Circuits?
A. Silicon wafer preparation
B. Silicon planar process
C. Epitaxial growth of silicon
D. Photolithography process

Answer: B
Clarification: The planar process (Silicon planar technology) in semiconductor industry built individual components. It is the primary process by which Integrated Circuits are built. The other processes are the different steps involved within the planar process.

8. Which semiconductor is most widely used for fabrication of Integrated Circuit?
A. Germanium, Ge
B. Gallium Arsenide, GaAs
C. Silicon, Si
D. All of the mentioned

Answer: C
Clarification: Silicon is abundantly available in the form of sand. It is possible to form superior stable SiO₂(Which has superb insulating property). Whereas GaAs is more difficult to grow in crystal form and Ge crystal will be destroyed at high temperature.

9. What will be the next step after slicing (process) silicon wafers?
A. All of the mentioned
B. Lapping
C. Polishing
D. Chemical

Answer: A
Clarification: When the silicon ingots are sliced for the given industrial dimension. It gives a rough surface and thus undergo lapping, polishing and chemical processing steps to get a smooth surface.

10. During ion implantation process (before the ion strike the wafer) the accelerated ions are passed through
A. Strong Electric field
B. Strong Magnetic field
C. Strong Electric and Magnetic Field
D. None of the mentioned

Answer: B
Clarification: During arc discharge in ion implantation, the unwanted impurities gets generated. The magnetic field acts to separate unwanted impurities from dopant ions.

11. In which method shallow penetration of dopants is possible?
A. Ion implantation
B. Vertical diffusion
C. Horizontal diffusion
D. Dopants diffusion

Answer: A
Clarification: The depth of diffusion in this method, can be easily regulated by control of the incident ion velocity and is capable of shallow penetration.

12. Which method is most suitable for silicon crystal growth in silicon wafer preparation?
A. Float zone process
B. Bridgeman-Stockbarger method
C. Czochralski crystal growth process
D. Laser heated pedestal growth

Answer: C
Clarification: Czochralski crystal growth processes obtain single crystal of semiconductor. The most important application of this method may be growth of large cylindrical ingot of single crystal silicon.

Linear Integrated Circuit Multiple Choice Questions on “Differential Amplifiers with Multiple Op-Amp – 1”.

1. Why differential amplifiers are preferred for instrumentation and industrial applications?
A. Input resistance is low
B. Produce amplified output
C. Amplify individual input voltage
D. Reject common mode voltage

Answer: D
Clarification: Differential amplifiers are preferred in these applications because they are better able to reject common-mode voltage than single input circuits and present balanced input impedance.

2. Which of the following is a combination of inverting and non-inverting amplifier?
A. Differential amplifier with one op-amp
B. Differential amplifier with two op-amps
C. Differential amplifier with three op-amps
D. Differential amplifier with four op-amps

Answer: A
Clarification: In differential amplifier with one op-amp both the inputs are connected to separate voltage source. So, if any one of the source is reduced to zero, differential amplifier acts as an inverting or non-inverting amplifier.

3. What will be the output voltage when V_x =0v?
(Where V_x –> inverting input terminal of differential amplifier with one op-amp)
A. V_o = -(1+R _F/R₁)*V₁
B. V_o = -(1- R _F/ R₁)*V₁
C. V_o = (1+ R _F/ R₁)*V₁
D. V_o = (R _F/ R₁)*V₁

Answer: C
Clarification: When V_x =0v, the configuration is a non-inverting amplifier.

4. Compute the output voltage from the following circuit diagram?

A. -17v
B. -27v
C. -39v
D. -15v

Answer: B
Clarification: Since V_B=0, the configuration becomes as an inverting amplifier. Hence, the output due to V_A is
V_o = -(R_F/R₁)*V_A = -(15kΩ/1.5kΩ)*2.7v = -10*2.7 = -27v.

5. Compute the output voltage if the input voltage is reduced to zero in differential amplifier with one op-amp?
A. Inverted Voltage
B. Same as the input voltage
C. Amplified inverted voltage
D. Cannot be determined

Answer: D
Clarification: It is not mentioned clearly whether inverting input or non-inverting input is reduced to zero. Therefore, the output cannot be determined.

6. The difference between the input and output voltage are -1v and 17v. Calculate the closed loop voltage gain of differential amplifier with one op-amp?
A. -51
B. 34
C. -17
D. 14

Answer: C
Clarification: Voltage gain of differential amplifier with one op-amp, A_D=Output voltage / Difference of input voltage
=> A_D = 17v/-1v = -17v.

7. For the differential amplifier given below, determine the V_x and R_F value. Assume that the circuit is initially nulled.

A. V_x = -8v, R_F = 9.9kΩ
B. V_x = 8v, R_F = 9.9kΩ
C. V_x = -8v, R_F = -9.9kΩ
D. V_x = 8v, R_F = -9.9kΩ

Answer: D
Clarification: The closed loop voltage gain, A_D = -(R_F/R₁)
=> RF = -3*3.3kΩ = -9.9kΩ
The net output is given is VO=-(RF /R1)*(Vx-Vy)
=> V_x= V_y– V_o (-R₁ /R_F)
=> V_x = 6+6(3.3kΩ/9.9kΩ) = 6+2 = 8v.

8. The gain of differential amplifier with one op-amp is same as that of
A. The inverting amplifier
B. The non-inverting amplifier
C. Both inverting and non-inverting amplifier
D. None of the mentioned

Answer: A
Clarification: The gain of differential amplifier is given as A_D= -(R_F /R₁), which is equivalent to the output voltage obtained from the inverting amplifier.

9. Find the value of input resistance for differential amplifier with one op-amp. If R₁ = R₂=100Ω and R_F = R₃ =5kΩ.
A. R_IFx = 110Ω; R_IFy = 6.7kΩ
B. R_IFx = 100Ω; R_IFy = 5.1kΩ
C. R_IFx = 150Ω; R_IFy = 7.2kΩ
D. R_IFx = 190Ω; R_IFy = 9.0kΩ

Answer: B
Clarification: The input resistance of inverting amplifier is R_IFx = (R1) and the input resistance of non-inverting amplifier is R_IFy = (R2+ R3)
=> ∴ R_IFx = 100Ω and
=> R_IFy =100+5kΩ =5.1kΩ.

10. What is the net output voltage for differential amplifier with one op-amp
A. V_o = -(R_F /R₁)*V_x
B. V_o = -(R_F /R₁)*(V_x -V_y)
C. V_o = (1+R_F /R₁)*(V_x -V_y)
D. None of the mentioned

Answer: B
Clarification: The net output voltage for differential amplifier with one op-amp is given as V_o= -(R_F /R₁)*(V_x-V_y).

Linear Integrated Circuit Multiple Choice Questions on “Slew Rate – 1”.

1. Slew rate is defined as the rate of change of
A. Output voltage with respect to time
B. Input voltage with respect to time
C. Both output input voltage with respect to time
D. None of the mentioned

Answer: A
Clarification: Slew rate is the maximum rate of change of output voltage caused by a step input voltage with respect to time.

2. How the slew rate is represented?
A. 1V/ms
B. 1V/s
C. 1V/µs
D. 1mv/S

Answer: C
Clarification: Slew rate are usually specified in V/µs. For example, 1 V/µs means that the output rises or falls no faster than 1V every microsecond.

3. The natural semiconductor LH0063C has a slew rate of
A. 1400V/µs
B. 6000V/µs
C. 500V/µs
D. None of the mentioned

Answer: B
Clarification: National semiconductor LH0063C has a slew rate of 6000V/µs. Generally practical op-amp is available with slew rate from 0.1V/µs to well above 1000V/µs.

4. Rise time is specified for
A. Large signal
B. Medium signal
C. Small signal
D. All of the mentioned

Answer: C
Clarification: Rise time is specified for small signal, usually when the peak output voltage is less than one volt.

5. Op-amps with wide bandwidth will have
A. Increase in output
B. Higher slew rate
C. Low response time
D. None of the mentioned

Answer: B
Clarification: An op-amp slew rate is related to its frequency response. Usually op-amps with wider bandwidth have higher (better) slew rate.

6. Which factor is responsible for causing slew rate?
A. Internal capacitor
B. External resistor
C. None of the mentioned
D. Both internal and external capacitor

Answer: D
Clarification: Capacitors require a finite amount of time to charge and discharge. Thus, a capacitor inside or outside the op-amp causes slew rate.

7. Find the value of capacitor, if the rate of change of voltage across the capacitor is 0.78V/µs and current= 12µA.
A. 5µF
B. 2µF
C. 10µF
D. 15µF

Answer: D
Clarification: Rate at which the voltage across the capacitor increases is given as dV_c/dt= I/C
=> C= I/ (dV_c/ dt) = 12µA/0.78V/µs = 15.38 ≅15µF.

8. Find the slew rate of op-amp from the output waveform given below?
A. 3.4V/µs
B. 10V/µs
C. 20.66V/µs
D. 16V/µs

Answer: C
Clarification: Slew rate is defined as the maximum rate of change of the output
SR = 3.1-(-3.1v)/ (0.6/2)µs =6.3/0.3 = 20.66Vµs.

9. For the circuit shown below, calculate the rate of change of output signal
A. V_m ωcosωt
B. V_m cosωt
C. V_m cosωt/ωt
D. V_m cosωt/ω

Answer: A
Clarification: The given circuit is a voltage follower circuit. So, input voltage = output voltage
=> V_o= V_msinωt
=>∴ the rate of change of the output voltage = dV_o /dt= d(V_msinωt)/ dt = V_m ωcosωt.

10. At what condition, the output of op-amp will be free of distortion?
A. Slew rate > 2πfV_m /10⁶ V/µs
B. Slew rate > 2πfV_m /10⁶ V/µs
C. Slew rate ≥ 2πfV_m /10⁶ V/µs
D. Slew rate = 2πfV_m /10⁶ V/µs

Answer: B
Clarification: As long as the value of right hand side equation is less than the slew rate of op-amp, the output wave form will always be undistorted.

Linear Integrated Circuit Multiple Choice Questions on “Multiplier and Divider – 1”.

1. Determine output voltage of analog multiplier provided with two input signal V_x and V_y.
A. V_o = (V_x ×V_x) / V_y
B. V_o = (V_x ×V_y / V_ref
C. V_o = (V_y ×V_y) / V_x
D. V_o = (V_x ×V_y) / V_ref²
Answer: B
Clarification: The output is the product of two inputs divided by a reference voltage in analog multiplier. Thus, the output voltage is a scaled version of x and y inputs.
=> V_o =V_x ×V_y / V_ref.

2. Match the list-I with list-II

List-I	List-II
1. One quadrant multiplier	i. Input 1- Positive, Input 2- Either positive or negative
2. Two quadrant multiplier	ii. Input 1- Positive, Input 2 – Positive
3. Four quadrant multiplier	iii. Input 1- Either positive or negative, Input 2- Either positive or negative

A. 1-ii, 2-i, 3-iii
B. 1-ii, 2-ii, 3-ii
C. 1-iii, 2-I, 3-ii
D. 1-I, 2-iii, 3-i
Answer: A
Clarification: If both inputs are positive, the IC is said to be a one quadrant multiplier. A two quadrant multiplier function properly, if one input is held positive and the other is allowed to swing. Similarly, for a four quadrant multiplier both the inputs are allowed to swing.

3. What is the disadvantage of log-antilog multiplier?
A. Provides four quadrant multiplication only
B. Provides one quadrant multiplication only
C. Provides two and four quadrant multiplication only
D. Provides one, two and four quadrant multiplication only
Answer: B
Clarification: Log amplifier requires the input and reference voltage to be of the same polarity. This restricts log-antilog multiplier to one quadrant operation.

4. An input of Vsinωt is applied to an ideal frequency doubler. Compute its output voltage?
A. V_o = [(V_x×V_y) /V_ref²] × [1-cos2ωt/2].
B. V_o = [(V_x²×V_y²) /V_ref] × [1-cos2ωt/2].
C. V_o = [(V_x×V_y)² /V_ref] × [1-cos2ωt/2].
D. V_o = [(V_x×V_y) /( V_ref] × [1-cos2ωt/2].
Answer: D
Clarification: In an ideal frequency doubler, same frequency is applied to both inputs.
∴ V_x = V_xsinωt and V_y = V_ysinωt
=> V_o = (V_x×V_y × sin²ωt) / V_ref = [(V_x×V_y) / V_ref] × [1-cos2ωt/2].

5. Find the output voltage for the squarer circuit given below, choose input frequency as 10kHz and V_ref =10v

A. V_o = 5.0-(5.0×cos4π×10⁴t)
B. V_o = 2.75-(2.75×cos4π×10⁴t)
C. V_o = 1.25-(1.25×cos4π×10⁴t)
D. None of the mentioned
Answer: C
Clarification: Output voltage of frequency V_o =V_i² / V_ref
=> V_i = 5sinωt = 5sin2π×10⁴t
V_o = [5×(sin2π×10⁴t)² ]/10 = 2.5×[1/2-(1/2cos2π ×2×10⁴t)] = 1.25-(1.25×cos4π×10⁴t).

6. Calculate the phase difference between two input signals applied to a multiplier, if the input signals are V_x= 2sinωt and V_y= 4sin(ωt+θ). (Take V_ref= 12v).
A. θ = 1.019
B. θ = 30.626
C. θ = 13.87
D. θ = 45.667
Answer: A
Clarification: V_o= [V_mx×V_my /(2×V_ref)] ×cosθ
=> (V_o×2×V_ref)/ (V_mx × V_my) = cosθ
=> cosθ = (10×2×12)/(2×4) = 30.
=> θ = cos^-130 =1.019.

7. Express the output voltage equation of divider circuit
A. V_o= -(V_ref/2)×(V_z/V_x)
B. V_o= -(2×V_ref)×(V_z/V_x)
C. V_o= -(V_ref)×(V_z/V_x)
D. V_o= -V_ref²×(V_z/V_x)
Answer: C
Clarification: The output voltage of the divider, V_o= -V_ref×(V_z/V_x).
Where V_z –> dividend and V_x –> divisor.

8. Find the divider circuit configuration given below

Answer: A
Clarification: Division is the complement of multiplication. So, the divider can be accomplished by placing the multiplier circuit element in the op-amp feedback loop.

9. Find the input current for the circuit given below.

A. I_Z = 0.5372mA
B. I_Z = 1.581mA
C. I_Z = 2.436mA
D. I_Z =9.347mA
Answer: B
Clarification: Input current, I_Z = -(V_x×V_o)/(V_ref×R) = -(4.79v×16.5v)/(10×5kΩ) = 1.581mA.

10. Find the condition at which the output will not saturate?

A. V_x > 10v ; V_y > 10v
B. V_x < 10v ; V_y > 10v
C. V_x < 10v ; V_y < 10v
D. V_x > 10v ; V_y < 10v
Answer: C
Clarification: In an analog multiplier, V_ref is internally set to 10v. As long as V_x < V_ref and V_y < V_ref, the output of multiplier will not saturate.

.

Linear Integrated Circuit Multiple Choice Questions on “Square Wave Generator”.

1. How are the square wave output generated in op-amp?
A. Op-amp is forced to operate in the positive saturation region
B. Op-amp is forced to operate in the negative saturation region
C. Op-amp is forced to operate between positive and negative saturation region
D. None of the mentioned

Answer: C
Clarification: Square wave outputs are generated where the op-amp is forced to operate in saturated region, that is, the output of the op-amp is forced to swing repetitively between positive saturation, +V_sat and negative saturation, -V_sat.

2. The following circuit represents a square wave generator. Determine its output voltage

A. -13 v
B. +13 v
C. ± 13 v
D. None of the mentioned

Answer: A
Clarification: The differential output voltage V_id = V_in1 – V_in2= 3-7v = -4v.
The output of the op-amp in this circuit depends on polarity of differential voltage V₀= -V_sat ≅ -V_ee = -13 v.

3. Determine the expression for time period of a square wave generator
A. T= 2RC ln×[( R₁+ R₂) / ( R₂)].
B. T= 2RC ln×[( 2R₁+ R₂) / ( R₂)].
C. T= 2RC ln×[( R₁+ 2R₂) / ( R₂)].
D. T= 2RC ln×[( R₁+ R₂) / (2 R₂)].

Answer: B
Clarification: The time period of the output waveform for a square wave generator is T= 2RC ln×[(2R₁+ R₂)/( R₂)].

4. Determine capacitor voltage waveform for the circuit

Answer: C
Clarification: When the op-amp output voltage is at negative saturation, V₁ = [(R₁) / (R₁+ R₂ )] × (-V_sat) = [10kΩ / ( 10 kΩ +11.6 kΩ)] × (-15v) = -7v.
Similarly, when the op-amp’s output voltage is at positive saturation, V₁ = [(R₁) / (R₁+ R₂ )] × (+V_sat) = [10kΩ/ ( 10 kΩ +11.6 kΩ)] × (+15v) = +7v
The time period of the output waveform,T= 2RC ln ×[( 2R₁+ R₂) / ( R₂)] = 2× 10kΩ × 0.05 µF× ln (2×10kΩ + 11.6kΩ) / 11.6kΩ] = 1×10^-3 × ln2.724 = 1ms.
The voltage across the capacitor will be a triangular wave form.

5. What will be the frequency of output waveform of a square wave generator if R₂ = 1.16 R₁?
A. f_o = (1/2RC.
B. f_o = (ln/2RC.
C. f_o = (ln /2 ×√RC.
D. f_o = (ln/√(2 RC.)

Answer: B
Clarification: When R₂= 1.16 R₁, then f_o = 1/2RC× ln[ (2R₁+ R₂) / R₂] = 1/2RC ×ln [(2R₁ + 1.161R₁ )/ (1.161R₁)] = 1/( 2RC×ln2.700)= 1/2RC.

6. What could be the possible output waveform for a free running multivibrator whose op-amp has a supply voltage of ±5v operating at 5khz?

Answer: C
Clarification: In a free running multivibrator, the output is forced to swing repetitively between positive and negative saturation to produce square wave output. Therefore, +V_sat ≅ +V_cc =+5v and -V_sat ≅ -V_cc =-5v.
=> Frequency= 5khz , f =1/t = 0.2ms.

7. Determine the output frequency for the circuit given below
A. 28.77 Hz
B. 31.97 Hz
C. 35.52 Hz
D. 39.47 Hz

Answer: D
Clarification: The output frequency f_o = 1/2RC×ln [ (2R₁+ R₂)/ R₂] = 1 / {(2×33kΩ ×0.33µF)×ln[(2×33kΩ +30kΩ)/30kΩ]} = 1/ (0.02175×ln 32) = 39.47 Hz.

8. The value of series resistance in the square wave generator should be 100kΩ or higher in order to
A. Prevent excessive differential current flow
B. Increase resistivity of the circuit
C. Reduce output offset voltage
D. All of the mentioned

Answer: A
Clarification: In practice, each inverting and non-inverting terminal needs a series resistance to prevent excessive differential current flow because the inputs of the op-amp are subjected to large differential voltages.

9. Why zener diode is used at the output terminal of square wave generator?
A. To reduce both output and capacitor voltage swing
B. To reduce output voltage swing
C. To reduce input voltage swing
D. To reduce capacitor voltage swing

Answer: B
Clarification: A reduced peak-peak output voltage swing can be obtained in the square wave generator by using back to back zener diodes at the output terminal.

10. A square wave oscillator has f_o =1khz. Assume the resistor value to be 10kΩ and find the capacitor value?
A. 3.9 µF
B. 0.3 µF
C. 2 µF
D. 0.05µF

Answer: D
Clarification: Let’s take R₂ = 1.16 R₂, therefore the output frequency f_o = 1/2RC
=> C = 1/2Rf_o = 1/ (2×10kΩ×1khz) = 0.05µF.

Linear Integrated Circuit Multiple Choice Questions on “Voltage Controlled Oscillator”.

1. Which device is used for diagnostic purposes and for recording?
A. Low pass filter
B. Monolithic PLL
C. Voltage Controlled Oscillator
D. None of the mentioned
Answer: C
Clarification: A Voltage Controlled Oscillator (VCO) is used for converting low frequency signals such as EEGs, EKG into an audio frequency range. These audio signals can be transmitted over two way radio communication systems for diagnostic purposes or can be recorded on a magnetic tape for further reference.

2. If the output of the Schmitt trigger is given below. Estimate the output at the pin 3 of VCO.


Answer: A
Clarification: In VCO, the output of Schmitt trigger is fed to the input of inverter. Therefore, the output at pin3 would be an inverted output. As the input is a square wave, the output obtained will be an inverted square wave.

3. Write the equation for time period of VCO?
A. (2×V_cc×C_T)/i
B. (V_cc C_T)/(2×i)
C. (V_cc×C_T×i)/2
D. (2×V_cc)/(i×C_T)
Answer: B
Clarification: The time period of VCO is given as T=2×△t =(2×0.25×V_cc ×C_T)/i =(0.5 V×_cc×C_T)/i = (V_cc×C_T)/(2×i).

4. Determine the value of current flow in VCO, when the NE566 VCO external timing resistor R_T =250Ω and the modulating input voltage V_c=3.25V.(Assume V_cc=+5v).
A. 3mA
B. 12mA
C. 7mA
D. 10mA
Answer: C
Clarification: Current flowing in VCO, i =(V_cc– V_c)/ R_T = (5V-3.25V)/250 = 1.75/250
=>i =7mA.

5. From the circuit given, find the value of output frequency?

A. 178.484 Hz
B. 104.84 Hz
C. 145.84 Hz
D. 110.88 Hz
Answer: B
Clarification: Output frequency, f_o =[2×(V_cc– V_c) ]/(C_T×R_T×V_cc )= [2x(8-1.5)]/(0.47µFx33kΩx8v) =13/0.124
=> f_o=104.84 Hz.

6. The output frequency of the VCO can be changed by changing
A. External tuning resistor
B. External tuning capacitor
C. Modulating input voltage
D. All of the mentioned
Answer: D
Clarification: The output frequency of VCO, f_o = [2×(V_cc– V_c)]/(C_T×R_T×V_cc).
From the equation, it is clear that the f_o is inversely proportional to C_T & R_T and directly proportional to V_c.Therefore, the output frequency can be changed by changing either voltage control, C_T or R_T.

7. Calculate the value of external timing capacitor, if no modulating input signal is applied to VCO. Consider f_o=25 kHz and R_T=5 kΩ.
A. 6nF
B. 100µF
C. 2nF
D. 10nF
Answer: C
Clarification: When modulating input signal is not applied to VCO, the output frequency becomes f_o=1/(4×R_T×C_T)
=> C_T =1/(4×R_T×f_o) =1/(4×5kΩ×25kHz) = 2×10^-9 =2nF.

8. What is the advantage of using filter?
A. High noise immunity
B. Reduce the bandwidth of PLL
C. Provides dynamic range of frequencies
D. None of the mentioned
Answer: A
Clarification: The charge on the filter capacitor gives a short time memory to the PLL. So, even if the signal becomes less than the noise for a few cycles, the dc voltage on the capacitor continues to shift the frequency of VCO, till it picks up the signal again. This produces high noise immunity.

9. Which filter is used in VCO?

Answer: D
Clarification: The loop filter used in the VCO can be one of the three types of filter shown above.

10. Choose the VCO for attaining higher output frequency.
A. NE566
B. SE566
C. MC4024
D. All of the mentioned
Answer: C
Clarification: MC4024 is used for attaining high output frequency, because the maximum output frequency of NE566 and SE566 is 500kHz.

11. Voltage to frequency conversion factor for VCO is
A. K_v = △V_c/ △f_o
B. K_v = △f_o/△V_c
C. K_v = △f_o × △V_c
D. K_v = 1/(△f_o×△V_c)
Answer: B
Clarification: The voltage to frequency conversion factor is defined as the change in frequency to the change in modulating input voltage.
=> K_v=△f_o/△V_c.

12. Calculate the voltage to frequency conversion factor, where f_o=155Hz and V_cc=10V.
A. 130
B. 124
C. 134
D. 116
Answer: B
Clarification: The voltage to frequency conversion factor, K_v = △f_o/△V_cc= 8×f_o/V_cc = (8×155)/10=124.

13. Find the equation for change in frequency of VCO?
A. △f_o = (2×△V_c)/(R_T×C_T×V_cc)
B. △f_o = △V_c/(4×R_T×C_T×V_cc)
C. △f_o = △V_c/(2×R_T×C_T×V_cc)
D. △f_o = (4×△V_c)/(R_T×C_T×V_cc)
Answer: A
Clarification: The original output frequency, f_o =2×[V_cc-V_c+△V_c]/[R_T×C_T×V_cc].
The new frequency f₁ =2×[V_cc-V_c]/[R_T×C_T×V_cc].
Change in frequency, △f_o= f_o– f₁ = 2×[V_cc-V_c+△V_c]/[R_T×C_T×V_cc]-{2×[V_cc-V_c]/[ R_T×C_T×V_cc]
=> △f_o = (2×△V_c)/(R_T×C_T×V_cc).

14. Using the given specifications, determine the voltage to frequency conversion factor.

A. 8.32
B. 8.90
C. 8.51
D. 8.75
Answer: C
Clarification: △f_o = 2×△V_c/(R_T×C_T×V_cc)
=>△V_c= (△f_o×R_T×C_T×V_cc)/2 = (4.7µFx10kΩx5x112)/2 = 13.16V.
K_v= △f_o/ △V_c = 112Hz/13.16V
=>K_v=8.51.

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