Category: Linear Integrated Circuits Objective Questions

Linear Integrated Circuit Interview Questions and Answers for fresherson “Operational Amplifier Internal Circuit – 4”.

1. To increase the input resistance, the differential amplifier replaces transistor by
A. Current mirror
B. Current repeater
C. Darlington pair
D. All of the mentioned

Answer: C
Clarification: Higher value of input resistance can be obtained by using Darlington pair in place of transistor.

2. In Darlington pair differential amplifier the current gain is given as 100. Where I_B1=5µA and I_C1=0.35mA. Determine I_C2
A. 0.5mA
B. 1.5mA
C. 2mA
D. 0.15mA

Answer: d
Clarification: The current gain in Darlington pair differential amplifier is given as β=( I_C1+I_C2)/I_B1.
Substituting the values in the equation, we get
I_C2=(β×I_B1)-I_C1 =(100×5µA.-0.35mA =0.15mA.

3. In the circuit shown, find the overall current gain?

A. 456218
B. 444878
C. 444210
D. 455734

Answer: B
Clarification: From the circuit given, I_B= I_B1 = 5.6µA.
I_E1= I_B1+ I_C1 = 1.43mA + 5.6µA = 1.435mA.
I_E1= I_B2 = 1.435mA.
The individual current gain values,
β₁=I_C1/ I_B1
=> β₁ = 1.43mA/5.6µA= 255.36.
Similarly,β₂=I_C2/ I_B2
=> β₂ = 2.5A / 1.435mA =1742.16
Therefore, the overall current gain, β = β₁ × β₂ = 255.36 × 1742.16 = 444878.

4. Introducing FET differential amplifier pair at the input stage of differential amplifier produces
A. High output resistance
B. High input resistance
C. Low input impedance
D. All of the mentioned

Answer: B
Clarification: Input resistance of the order 10¹² Ω is possible with JFET at the input stage of differential amplifier.

5. Why active load is used in amplifier to obtain large gain in intermediate stage of amplifier?
A. To obtain a very large voltage gain
B. To get High input resistance
C. To reduce the noises
D. To increase current gain

Answer: A
Clarification: To increase gain usually large collector resistance value as gain is proportional to load resistor. However, due to limitation of maximum value load resistor, active loads are used in amplifier to obtain large gain in intermediate stages of amplifier.

6. Which circuit is used as active load for an amplifier
A. Wildar Current source
B. Darlington pair
C. Current Mirror
D. All of the mentioned

Answer: C
Clarification: Current mirror has DC resistance (order of few kΩ), as quiescent voltage across it is a fraction of supply voltage and current in milliampere.

7. What is the equation of load current for a differential amplifier with an active load?
A. I_L = g_m×v_d
B. I_L = I_q /2
C. I_L = β×I_q×( V_in1 – V_in2)
D. I_L = 2×g_m/( V_in1 – V_in2)

Answer: A
Clarification: The load current is given as product of difference between input & output voltage and transconductance. Therefore, the equation of load current is ,
I_L = g_m×v_d.

8. The input voltage of a difference amplifier are 2.5v and 4.9v. If the transconductance is 0.065Ω^-1, determine the load current entering the next stage
A. 0.156A
B. 1.56A
C. 0.156mA
D. 15.6µA

Answer: A
Clarification: Load current entering the next stages of amplifier is the sum of individual load current, which is given by I_L = I_L1+ I_L2 (Since only two input voltages are given).
I_L = g_m×V_in1 + g_m×V_in2
= g_m×( V_in1 – V_in2) = 0.065 Ω^-1×(4.9v-2.5v) = 0.156A.

9. Calculate the V_I – V_O for the level shifter shown in the figure (Assume identical silicon transistor and very large value of β). Transistor Q_A and Q_B form current mirror.

A. 5.56V
B. 6.00v
C. 7.98v
D. 6.65v

Answer: D
Clarification: Since the transistor Q_A and Q_B form current mirror, I_CA= I_CB = I.
=> I = (V_CC – V_BE) / R₀ = (15v-0.7)/12k Ω (for β>>1, output current =input current)
=> I= 1.19mA.
The shift in level is given as V_I – V_O = V_BE + I×R₁ =0.07v+1.19mA×5kΩ =6.65v.

10. Load resistors (Re) is neglected for maximizing the voltage gain in amplifier because,
A. Requires large chip are
B. Requires large power supply
C. Quiescent drop across Re increases
D. All of the mentioned

Answer: D
Clarification: As gain is proportional to load resistor, large resistance value is required. Due to limitation mentioned, it is neglected.

11. What is the need for level shifter in operational amplifier?
A. Level the quiescent voltage
B. Remove distortion at output
C. Limits the output voltage
D. Increase the quiescent voltage

Answer: C
Clarification: Because of direct couple, Dc level rises stages to stage and tends to shift operating point. This limits output swing (Voltage).

12. Limitation of an output stage amplifier, if it emitter follower with complementary transistor
A. Cross-over distortion
B. Low impedance output
C. Shift in level
D. Active load current

Answer: a
Clarification:The limitation in the amplifier is that , the output voltage remains zero until the input voltage exceeds cut in voltage V_BE= 0.5v, which is known as cross-over distortion.

13. An output stage amplifier can produce output signal, when the input signal is
A. 0.48v
B. 0.9v
C. 1.2v
D. 0.5v

Answer: C
Clarification: In an Output stage amplifier, due to cross-over distortion output voltage produces input voltage is greater than two times of cut-in voltage which is equal to 1v.
Since, V_BE= 0.5v
=> 2×V_BE= 1v.

14. Find the disadvantage in the following circuit diagram:

A. Voltage get attenuated by R₁
B. Voltage get attenuated by R₂
C. Voltage get attenuated by R₁ and R₂
D. Voltage shift get increased by the drop across R₁ and R₂

Answer: B
Clarification: The output taken at the junction of R₁ and R₂ increases the voltage shift. However, the disadvantage is that, the signal voltage gets attenuated by R₂.
=> R₂/(R₁ + R₂).

Linear Integrated Circuit Multiple Choice Questions on “Ideal Operational Amplifier”.

1. Determine the output from the following circuit
A. 180^o in phase with input signal
B. 180^o out of phase with input signal
C. Same as that of input signal
D. Output signal cannot be determined

Answer: B
Clarification: The input signal is given to the inverting input terminal. Therefore, the output V_o is 180^o out of phase with input signal V₂.

2. Which of the following electrical characteristics is not exhibited by an ideal op-amp?
A. Infinite voltage gain
B. Infinite bandwidth
C. Infinite output resistance
D. Infinite slew rate

Answer: C
Clarification: An ideal op-amp exhibits zero output resistance so that output can drive an infinite number of other devices.

3. An ideal op-amp requires infinite bandwidth because
A. Signals can be amplified without attenuation
B. Output common-mode noise voltage is zero
C. Output voltage occurs simultaneously with input voltage changes
D. Output can drive infinite number of device

Answer: A
Clarification: An ideal op-amp has infinite bandwidth. Therefore, any frequency signal from 0 to ∞ Hz can be amplified without attenuation.

4. Ideal op-amp has infinite voltage gain because
A. To control the output voltage
B. To obtain finite output voltage
C. To receive zero noise output voltage
D. None of the mentioned

Answer: B
Clarification: As the voltage gain is infinite, the voltage between the inverting and non-inverting terminal (i.e. differential input voltage) is essentially zero for finite output voltage.

5. Determine the output voltage from the following circuit diagram?
D. None of the mentioned

Answer: C
Clarification: In an ideal op-amp when the inverting terminal is zero. The output will be in-phase with the input signal.

6. Find the output voltage of an ideal op-amp. If V₁ and V₂ are the two input voltages
A. V_O= V₁-V₂
B. V_O= A×(V₁-V₂)
C. V_O= A×(V₁+V₂)
D. V_O= V₁×V₂

Answer: B
Clarification: The output voltage of an ideal op-amp is the product of gain and algebraic difference between the two input voltages.

7. How will be the output voltage obtained for an ideal op-amp?
A. Amplifies the difference between the two input voltages
B. Amplifies individual voltages input voltages
C. Amplifies products of two input voltage
D. None of the mentioned

Answer: A
Clarification: Op-amp amplifies the difference between two input voltages and the polarity of the output voltage depends on the polarity of the difference voltage.

8. The signal to an inverting terminal of an ideal op-amp is zero. Find the output voltage, if the other input voltage is
D. Data provided is insufficient

Answer: A
Clarification: Although the output is 180^o out of phase with input signal, the gain of the amplifier is not given.

9. Which is not the ideal characteristic of an op-amp?
A. Input Resistance –> 0
B. Output impedance –> 0
C. Bandwidth –> ∞
D. Open loop voltage gain –> ∞

Answer: A
Clarification: Input resistance is infinite so almost any signal source can drive it and there is no loading of the preceding stage.

10. Find the ideal voltage transfer curve of a normal op-amp.

Answer: C
Clarification: The ideal voltage transfer curve would be almost vertical because of the very large value of gain.

11. Find the input voltage of an ideal op-amp. It’s one of the inputs and output voltages are 2v and 12v. (Gain=3)
A. 8v
B. 4v
C. -4v
D. -2v

Answer: D
Clarification: The output voltage, V_O = (Vin₁– Vin₂)
=> 12v=3×(2- Vin₂)
=> Vin₂= -2v.

12. Which factor determine the output voltage of an op-amp?
A. Positive saturation
B. Negative saturation
C. Both positive and negative saturation voltage
D. Supply voltage

Answer: C
Clarification: Output voltage is proportional to input voltage only until it reaches the saturation voltage. The output cannot exceed the positive and negative saturation voltage. These saturation voltages are specified by an output voltage swing rating of the op-amp for given values of supply voltage.

Linear Integrated Circuit Multiple Choice Questions on “High Frequency Op-Amp Equivalent Circuit”.

1. Which factor is responsible for the gain of the op-amp to roll-off after a certain frequency is reached
A. Capacitive effect
B. Resistive effect
C. Inductor effect
D. None of the mentioned
Answer: A
Clarification: The gain of the op-amp roll-off due to the presence of capacitive component, in the equivalent circuit of op-amp. The frequency increases as the reactance of the component decreases.

2. What remedy can be followed to maintain the operating frequency in the op-amps?
A. Use LC circuit
B. Use resistor
C. Use capacitor
D. Use transistor
Answer: C
Clarification: Capacitors are used in the high frequency model of the op-amp at the output terminal to maintain or control the frequency.

3. How does the physical characteristic of semiconductor account for the increase in frequency of op-amps?
A. Transistor values
B. Junction capacitance
C. Dopant concentration
D. None of the mentioned
Answer: B
Clarification: Op-amps are composed of BJTs and FETs which contain junction capacitors. These junction capacitors are very small and take finite values at higher frequency. So, when the reactances of these capacitors decrease, the frequency increases.

4. How are op-amp with three break frequency are represented
A. Using two capacitors
B. Using three capacitors
C. Using one capacitor
D. All of the mentioned
Answer: B
Clarification: Op-amps with more than one break frequency may be represented by using as many capacitors as the break frequency they have.

5. In what way the internal construction of the op-amp contribute to capacitive effect in op-amp?
A. Formation of junction capacitor
B. Due to internally connected capacitors
C. Formation of stray capacitor
D. None of the mentioned
Answer: C
Clarification: In op-amps a number of transistors, resistors and capacitors are integrated on the same substrate. In fact substrates act as an insulator and separate these components. So, the various components are connected by conducting paths. However, when two conducting paths are separated by an insulator, it acts as a capacitor (stray capacitor).

6. Determine the high frequency model op-amp with single break frequency

Answer: A
Clarification: Op-amp with only one break frequency is represented by adding a single capacitor at the output.

7. The gain of the differential amplifier is -125. Assume the voltage applied to bridge circuit V_dc=+10v and the unstrained resistance of four element of strain gage is 200Ω. When a certain weight is placed on the platform, the output voltage V_o=5v. Determine the change in resistance of each strain gage for analog weight scale. (Assuming the output is initially nulleD..
A. 1Ω
B. 0.8Ω
C. 0.3Ω
D. 1.83Ω
Answer: B
Clarification: The output voltage of analog weight scale, V_o = V_dc×(△R/R)×(R_F/R₁)
=> △R=( V_o/ V_dc)×(R₁/R_F)×R =( 5v×200Ω)/(125×10v) =0.8Ω.

8. Assume that the increase and decrease in the resistance of the strain gage element is by the same number of △R. Determine the unbalanced voltage equation.
A. V = – V_dc×(△R/R)
B. V = – V_dc×(△R/R+△R)
C. V = V_dc×(△R/R)
D. V = – V_dc×[(△R+ R)/R].
Answer: A
Clarification: When the unstrained gage resistance are same, then the output voltage of the strain gage bridge circuit (unbalanced voltage) is given as V= -V_dc×(△R/R).

.

Linear Integrated Circuit Multiple Choice Questions on “Band Pass Filter”.

1. Which filter attenuates any frequency outside the pass band?
A. Band-pass filter
B. Band-reject filter
C. Band-stop filter
D. All of the mentioned

Answer: A
Clarification: A band- pass filter has a pass band between two cut-off frequencies f_H and f_L. So, any frequency outside this pass band is attenuated.

2. Narrow band-pass filters are defined as
A. Q < 10
B. Q = 10
C. Q > 10
D. None of the mentioned

Answer: C
Clarification: Quality factor (Q) is the measure of selectivity, meaning higher the value of Q, the narrower its bandwidth.

3. A band-pass filter has a bandwidth of 250Hz and center frequency of 866Hz. Find the quality factor of the filter?
A. 3.46
B. 6.42
C. 4.84
D. None of the mentioned

Answer: A
Clarification: Quality factor of band-pass filter, Q =f_c/bandwidth= 566/250=3.46.

4. Find the center frequency of wide band-pass filter
A. f_c= √(f_h ×f_L)
B. f_c= √(f_h +f_L)
C. f_c= √(f_h -f_L)
D. f_c= √(f_h /f_L)

Answer: A
Clarification: In a wide band-pass filter, the product of high and low cut-off frequency is equal to the square of center frequency
i.e. ( f_c)² =f_H×f_L
=> f_c= √(f_h×f_L).

5. Find out the voltage gain magnitude equation for the wide band-pass filter.
A. A_Ft×( f/f_L)/√[(1+(f/f_h)²]×[1+(f/f_L)²].
B. A_Ft/ √{[1+(f/f_h)²]×[1+(f/f_L)²]}
C. A_Ft/ √{[1+(f/f_h)²]/[1+(f/f_L)²]}
D. [A_Ft/(f/f_L)]/ √{[1+(f/f_h)²]/[1+(f/f_L)²]}

Answer: A
Clarification: The voltage gain magnitude of the band-pass filters equal to the product of the voltage gain magnitudes of high pass and low pass filter.

6. When a second order high pass filter and second order low pass sections are cascaded, the resultant filter is a
A. ±80dB/decade band-pass filter
B. ±40dB/decade band-pass filter
C. ±20dB/ decade band-pass filter
D. None of the mentioned

Answer: B
Clarification: The order of the band-pass filter depends on the order of the high pass and low pass filter sections.

7. Find the voltage gain magnitude of the wide band-pass filter?
Where total pass band gain is=6, input frequency = 750Hz, Low cut-off frequency =200Hz and
high cut-off frequency=1khz.
A. 13.36 dB
B. 12.25 dB
C. 11.71 dB
C. 14.837dB

Answer: D
Clarification: Voltage gain of the filter,
|V_O/V_in|=[A_Ft×(f/f_L)]/{√[1+(f/f_L)²]×[1+f/f_L)²]} =[6×(750/20)]/√{[1+(750/200)²]×[1+(750/200)²]}
=22.5/√(15.6×1.56) =5.519.
|V_O/V_in|= 20log(5.519) =14.837dB.

8. Compute the quality factor of the wide band-pass filter with high and low cut-off frequencies equal to 950Hz and 250Hz.
A. 0.278
B. 0.348
C. 0.696
D. 0.994

Answer: C
Clarification: Quality factor Q=√(f_h×f_L)/(f_h-f_L) = √(950Hz×250Hz)/(9950Hz-250Hz) =0.696.

9. The details of low pass filter sections are given as f_h =10kHz, A_F= 2 and f=1.2kHz. Find the voltage gain magnitude of first order wide band-pass filter, if the voltage gain magnitude of high pass filter section is 8.32dB.
A. 48.13dB
B. 10.02dB
C. 14.28dB
D. 65.99dB

Answer: C
Clarification: |V_O/V_in|(high pass filter) = 8.32d_B=10^(8.32/20) =2.606.
Therefore, the voltage gain of wide band-pass filter |V_O/V_in|= A_Ft×(f/f_L)/√[1+(f/f_h)²)]×[1+(f/f_L)²)]
={A_f/√[(1+(f/f_h)²]}×{(A_f×f/f_L)/√[1+(f/f_L)²]} =A_ft /√[1+(f/f_h)²]×(2.606)
= [2/√(1+(1.2kHz/10kHz)²]×( 2.606) = 1.986×2.606 =5.17 =20log×(5.17) =14.28dB.

10. The quality factor of a wide band-pass filter can be
A. 12.6
B. 9.1
C. 14.2
D. 10.9

Answer: B
Clarification: A wide band-pass filter has quality factor less than 10.

11. Design a narrow band-pass filter, with f_c=1kHz, Q= 13 and A_F=10 (Take C=0.1µF)

Answer: B
Clarification: Given C =0.1µF.
Therefore, C₁=C₂ =0.1µF.
R₁ =Q/(2π×f_c×CA_F) =13/( 2π×1kHz×0.1µF×10) =13/6.28 = 2.07 ≅ 2Ω.
R₂ =Q/{2π×f_c×C ×[(2Q²)- A_F]} =13/{(2π×1kHz×0.1µF×[2×(13²)-10]} = 13/0.2059=63.11 ≅ 63Ω.
R₃ =Q/(π×f_c×C. = 13/(π×1kHz×0.1µF) = 13/3.14×10^-4 =41.40kΩ ≅41kΩ.

12. If the gain at center frequency is 10, find the quality factor of narrow band-pass filter
A. 1
B. 2
C. 3
D. None of the mentioned

Answer: C
Clarification: The gain of the narrow band-pass filter must satisfy the condition, A_F= 2×Q²
When Q=3,
=> 2×Q² =2×(3²) =18.
=> 10<18. Hence condition is satisfied when Q=3.

13. The advantage of narrow band-pass filter is
A. f_c can be changed without changing gain
B. f_c can be changed without changing bandwidth
C. f_c can be changed without changing resistors
D. All of the mentioned

Answer: D
Clarification: As the narrow band-pass filter has multiple filters. The center frequency can be changed to a new frequency without changing the gain or bandwidth and is accomplished by changing the resistor to a new value which is given as
R’=R×(f_L/f_c)².

Linear Integrated Circuit Multiple Choice Questions on “Clippers and Clampers”.

1. Which circuit is used for obtaining desired output waveform in operational amplifier?
A. Clipper
B. Clamper
C. Peak amplifier
D. Sample and hold

Answer: A
Clarification: In an op-amp clipper circuits a rectifier diode is used to clip off certain portions of the input signal to obtain a designed output waveform.

2. The clipping level in op-amp is determined by
A. AC supply voltage
B. Control voltage
C. Reference voltage
D. Input voltage

Answer: C
Clarification: The clipping level is determined by the reference voltage which should be less than the input voltage range of an op-amp.

3. In a positive clipper, the diode conducts when
A. V_inref
B. V_in = V_ref
C. V_in > V_ref
D. None of the mentioned

Answer: B
Clarification:In a positive clipper, the diode conducts until V_in = V_ref (during the positive half cycle of the input), because when V_inref, the voltage (V_ref) at the negative input is higher than that at the positive input.

4. What happens if the potentiometer R_p is connected to negative supply?

A. Output waveform below -V_ref will be clipped off
B. Output waveform above +V_ref will be clipped off
C. Output waveform above -V_ref will be clipped off
D. Output waveform below +V_ref will be clipped off

Answer: C
Clarification: If the potentiometer R_p is connected to negative supply -V_EE instead of +V_CC, the reference voltage V_ref will be negative. As a result the entire output waveform above -V_ref to be clipped off.

5. Find the output waveform for when V_inref
Answer: C
Clarification: The negative portion of the output voltage below -V_ref is clipped off because, diode will be in off condition when V_inref.

6. What happens if the input voltage is higher than reference voltage in a positive clipper?
A. Output voltage = Reference voltage
B. Output voltage = DC Positive voltage
C. Output voltage = Input voltage
D. All of the mentioned

Answer: A
Clarification: When input voltage is higher than reference voltage, the op-amp operates in open loop and diode become reverse biased. Thus, the output voltage will be equal to reference voltage.

7. A positive small signal halfwave rectifier can
A. Rectify signals with peak value only
B. Rectify signals with value of few millivolts only
C. Rectify signals with both peak value and down to few millivolts
D. None of the mentioned

Answer: C
Clarification: A positive small signal halfwave rectifier can rectify signals with peak values down to few millivolts, because the high open loop gain of the op-amp automatically adjusts the voltage drive to the diode, so that the rectified output peak is the same as the input.

8. Determine the output waveform of negative small signal half wave rectifier.

Answer: D
Clarification: During the positive alteration of V_in, D₁ is reverse biased. Therefore, V_o =0v. On the other hand, during the negative alteration, D₁ is forward biased and hence V_o follows V_in.

9. Diode in small signal positive halfwave rectifier circuit acts as
A. Ideal diode
B. Clipper diode
C. Clamper diode
D. Rectifier diode

Answer: A
Clarification: The diode acts as an ideal diode, since the voltage across the ON diode is divided by the open loop gain of the op-amp. As the input voltage starts increasing in the positive direction, the output of the op-amp also increases positively till the diode become forward biased.

10. How to minimize the response time and increase the operating frequency range of the op-amp?
A. Positive halfwave rectifier with two diodes
B. Positive halfwave rectifier with one diode
C. Negative halfwave rectifier with two diodes
D. Negative halfwave rectifier with one diode

Answer: C
Clarification: Negative halfwave rectifier circuit with two diodes are used so that the output of the op-amp does not saturate. Thus, minimizes the response time and increases the operating frequency range.

11. Why a voltage follower stage is connected at the output of the negative small signal half wave rectifier?
A. Due to Non-uniform input resistance
B. Due to Non-uniform output resistance
C. Due to Uniform output voltage
D. None of the mentioned

Answer: B
Clarification: The output resistance of the circuit is non-uniform as it depends on the state of diode. That is, the output impedance is low when diode is on and high when diode is off.

12. A circuit with a predetermined dc level is added to the output voltage of the op-amp is called
A. Clamper
B. Positive clipper
C. Halfwave rectifier
D. None of the mentioned

Answer: A
Clarification: A clamper clamps the output to a desired dc level.

13. Determine the output waveform for a peak amplifier with input =4V_psinewave and V_ref=1V.

Answer: A
Clarification: In a peak amplifier the input waveform peak is clamped at V_ref.
The output voltage V_o=2V_p+V_ref=(2×4v)+1v = 9v.

14. An op-amp clamper circuit is also referred as
A. DC cutter
B. DC inserter
C. DC lifter
D. DC leveller

Answer: B
Clarification: In an op-amp clamper circuit, a pre-determined dc level is deliberately inserted at the output voltage. For this reason, the clamper is sometimes called as DC inserter.

15. At what values of C_i and R_d a precision clamping can obtained in peak clamper when the time period of the input waveform is 0.4s?
A. C_i=0.1µF and R_d=10kΩ
B. C_i=0.47µF and R_d=10kΩ
C. C_i=33µF and R_d=10kΩ
D. C_i=2.5µF and R_d=10kΩ

Answer: A
Clarification: For precision clamping, C_i and R_d-3 i=0.1µF and R_d=10kΩ.