250+ TOP MCQs on Interrupt Programming and Answers

8051 Micro-controller Multiple Choice Questions on “Interrupt Programming”.

1. When an interrupt is enabled, then where does the pointer moves immediately after this interrupt has occurred?
a) to the next instruction which is to be executed
b) to the first instruction of ISR
c) to a fixed location in memory called interrupt vector table
d) to the end of the program

Answer: c
Clarification: When an interrupt occurs, then it jumps to a fixed memory location in memory called the interrupt vector table that holds the address of the Interrupt Service Routine.

2. What are the contents of the IE register, when the interrupt of the memory location 0x00 is caused?
a) 0xFFH
b) 0x00H
c) 0x10H
d) 0xF0H

Answer: b
Clarification: When interrupt of 0x00 is caused (the reset interrupt) then all the other interrupts will be disabled or the contents of the IE register becomes null.

3. After RETI instruction is executed then the pointer will move to which location in the program?
a) next interrupt of the interrupt vector table
b) immediate next instruction where interrupt is occurred
c) next instruction after the RETI in the memory
d) none of the mentioned

Answer: b
Clarification: When the RETI instruction is executed, PC will fetch 2-bytes (address) from top of stack which is stored when interrupt is occurred. This will return to the place where interrupt is occurred and starts executing instructions.

4. Which pin of the external hardware is said to exhibit INT0 interrupt?
a) pin no 10
b) pin no 11
c) pin no 12
d) pin no 13

Answer: c
Clarification: INT0 interrupt is caused when pin no 12 in the hardware of the 8051 controller is enabled with a low leveled pulse.

5. Which bit of the IE register is used to enable TxD/RxD interrupt?
a) IE.D5
b) IE.D2
c) IE.D3
d) IE.D4

Answer: d
Clarification: IE.D4 is used to enable RS interrupt or the serial communication interrupt.

6. Which of the following combination is the best to enable the external hardware interrupt 0 of the IE register (assuming initially all bits of the IE register are zero)?
a) EX0=1
b) EA=1
c) any of the mentioned
d) EX0=1 & EA=1

Answer: d
Clarification: For executing the EX0 interrupt, the EX0 and EA bits of the IE register should be set. EA is set to enable all the interrupts and EX0 is set to enable the external hardware interrupt 0 interrupt and mask the other enabled interrupts.

7. Why normally LJMP instructions are the topmost lines of the ISR?
a) so as to jump to some other location where there is a wider space of memory available to write the codes
b) so as to avoid overwriting of other interrupt instructions
c) all of the mentioned
d) none of the mentioned

Answer: c
Clarification: There is a small space of memory present in the vector table between two different interrupts so in order to avoid overwriting of other interrupts we normally jump to other locations where a wide range of space is available.

8. Which register is used to make the interrupt level or an edge triggered pulse?
a) TCON
b) IE
c) IPR
d) SCON

Answer: a
Clarification: TCON register is used to make any interrupt level or edge triggered.

9. What is the disadvantage of a level triggered pulse?
a) a constant pulse is to be maintained for a greater span of time
b) another interrupt may be generated if the low-level signal is not removed before the ISR is finished
c) it is difficult to produce
d) another interrupt may be caused if the signal is still low before the completion of the last instruction

Answer: d
Clarification: In a level triggered interrupt, if the low signal at interrupt pin must be removed before the execution of last instruction of the ISR i.e. RETI. If low signal at interrupt pin is not removed before completing the ISR then it will be generating another interrupt.

10. What is the correct order of priority that is set after a controller gets reset?
a) RI/TI > TF1 > TF0 > INT1 > INT0
b) RI/TI < TF1 < TF0 < INT1 < INT0
c) INT0 > TF0 > INT1 > TF1 > RI/TI
d) INT0 < TF0 < INT1 < TF1 < RI/TI

Answer: c
Clarification: On reset Interrupt Priorities are as INT0 > TF0 > INT1 > TF1 > RI/TI, where ‘>’ is used to denote highest priority.

250+ TOP MCQs on Keyboard Interfacing and Answers

AVR Microcontroller Problems on “Keyboard Interfacing”.

1. In reading the columns of a keyboard matrix, when no key is pressed then all the pins show?
a) 0
b) 1
c) F
d) 7

Answer: b
Clarification: When no key is pressed, in a keyboard then all the pins will read 1 as they all are connected to the main power supply.

2. To see if any key is pressed, all rows are grounded.
a) true
b) false
c) can’t be said
d) depends on the conditions

Answer: a
Clarification: To see that whether any key is pressed or not then all the rows are grounded so that columns can be read to deliver the better results.

3. Identify the row and the column for the following case when for the row D3-D0= 1110 and for the column D3-D0= 1101
a) first row and second column
b) first row and third column
c) second row and first column
d) second row and second column

Answer: a
Clarification: To identify the key that is pressed from this particular combination, we obtain that the key belongs to the first row and the second column as the D0 bit of the row port and the D1 bit of the column port are zero.

4. What are the actual steps that are followed in identifying any key that is being pressed?
a) wait for the debounce time
b) identify the key that is pressed
c) initially no key should be pressed
d) all of the mentioned

Answer: d
Clarification: In order to identify that which key is actually pressed form a particular format of a 3*3 matrix keyboard, we firstly ensure all initially all the keys are open, then we press a key and check that whether the key is actually pressed or not by waiting for a time span of 20mseconds, after this we identify the key that is pressed by masking the bits of the port. In this particular format, we can identify the key that is actually pressed.

5. To identify that the key is present in which row and the column
a) we ground the bits of the row one by one
b) we ground the bits of the column one by one
c) we connect the bits of the row to the logic level 1 one by one
d) we can connect the columns to the logic level 1 one by one

Answer: a
Clarification: To determine that the pressed key is in which row and column, we ground the rows one by one to determine the column by masking the bits separately.

6. The key detection and the key identification are two different procedures?
a) true
b) false
c) depends on the circumstances
d) difficult to tell

Answer: a
Clarification: The key detection and the key identification are the two different procedures, one is used to detect that whether any key is pressed or not and the other technique is used to find that the pressed key is located in which row and column.

7. What is described by the following command?
KCODE0<<1
a) load KCODE0 with 0
b) rotate the contents of the KCODE0 register to the right
c) rotate the contents of the KCODE0 register to the left
d) none of the mentioned

Answer: b
Clarification: KCODE0<<1 means to rotate the contents of the KCODE0 register to the left after every loop.

8. If the pins of the keyboard are used as an interrupt, then these pins will cause an interrupt of what type?
a) External hardware interrupt
b) Timer interrupt
c) TI/RI interrupt
d) None of the mentioned

Answer: a
Clarification: The pins of the keyboard act as an external hardware interrupt as some external pulse is helping in generating this interrupt.

9. What will happen if the two keys of the keyboard are pressed at a time?
a) both the keys will be displayed on the screen
b) the key which is being actually pressed(for more then 20microseconds) will be displayed
c) the key that is pressed first will be displayed
d) none of the mentioned

Answer: b
Clarification: If two or more keys are pressed at a time, then the key that will be pressed for more then 20 microseconds will be displayed on the screen.

10. Why initially all keys are considered open before detecting the key pressed?
a) to make the task easy
b) to remove the errors caused by other pressing keys during detection
c) to remove the flow problems
d) none of the mentioned

Answer: b
Clarification: Initially all keys are considered open in order to ensure the accuracy while identification of the pressed key.

250+ TOP MCQs on MSP430 TIMER1 and Answers

MSP430 Micro-controller Multiple Choice Questions on “Timer1”.

1. Which of the following is true about the FRFQx bits of the BTCTL register?
a) these bits are used for clock input
b) these bits are used for setting a particular frequency fLCD
c) these bits start the timer
d) these bits stop the timer

Answer: b
Clarification: FRFQx bits of the BTCTL register are used for selecting a particular frequency fLCD varying from fACLK/256 to fACLK/32.

2. Timer1 is responsible for ________
a) providing a clock to the LCD module
b) cause an interrupt
c) a pulse for the RTC
d) all of the mentioned

Answer: d
Clarification: Timer1 is responsible for providing a clock for the LCD module. It can also cause an interrupt if the BTIE bit is high. It also provides the clock to the RTC.

3. For fACLK = 32 KHz, what would be the desirable range of fLCD?
a) 2hz-256hz
b) 12hz-512hz
c) 128hz-1khz
d) 1khz-10khz

Answer: c
Clarification: For fACLK = 32khz, the desirable range of the fLCD is the fACLK/256 to fACLK/32. This value comes out to be in the range of 128hz-1khz.

4. Normally BTCNT1 only function is to provide a prescalar for the BNTCNT2?
a) true
b) false
c) cant be said
d) depends on the conditions

Answer: a
Clarification: LCD’s controllers nowadays don’t require a clock pulse, so the only main function of the BTCNT1 is to provide a prescalar for the BNTCNT2.

5. BTCNT2 provides 2 output signals?
a) true
b) false
c) cant be said
d) depends on the conditions

Answer: b
Clarification: BNTCNT2 has no outputs. Instead, it raises the BTIFG flag at a frequency determined by the BTIPx bits.

6. RTCSEC, RTCMIN, RTCDOW etc. are the bytes of a set of registers that are used to store
a) seconds
b) minutes
c) days of a week
d) all of the mentioned

Answer: d
Clarification: The current time and date are held in a set of registers that contain the following bytes like RTCSEC, RTCMIN, RTCHOUR, RTCDOW etc.

7. The RTC module is configured in the calendar mode if __________
a) RTCMODE bit is reset
b) RTCMODE is set
c) RTCRDY is reset
d) RTCRDY is set

Answer:b
Clarification: Calendar mode is selected when RTCMODE is set.

8. The RTC module makes use of the Basic Timer1 because of _________
a) its bytes are controlled in the Basic Timer1 register
b) it is started by timer1
c) it is ended by basic timer1
d) it needs a clock pulse of 1hz that is provided by basic timer1

Answer: d
Clarification: The RTC module requires a clock of worth 1hz that is provided by basic timer1 so that why it makes use of basic timer1.

9. IF RTCIE interrupt is generated then _________
a) BTIFG flag is set
b) RTCFG flag is set
c) Both flags are set
d) None of the flag is set

Answer: c
Clarification: When RTCIE interrupt is generated then both BTIFG and RTCFG flags are set simultaneously.

10. What does the RTCTEVx bits do?
a) they cause an interrupt
b) they end an interrupt
c) they set the minute, hour, seconds daily at midnight or daily at noon
d) all of the mentioned

Answer: c
Clarification: Every minute, every hour, daily at midnight or daily at noon are set by the bits of the RTCTEVx bits of the RTCCTL register.

250+ TOP MCQs on LCD Interfacing and Answers

8051 Micro-controller Multiple Choice Questions on “LCD Interfacing”.

1. How many rows and columns are present in a 16*2 alphanumeric LCD?
a) rows=2, columns=32
b) rows=16, columns=2
c) rows=16, columns=16
d) rows=2, columns=16

Answer: d
Clarification: 16*2 alphanumeric LCD has 2 rows and 16 columns.

2. How many data lines are there in a 16*2 alphanumeric LCD?
a) 16
b) 8
c) 1
d) 0

Answer: b
Clarification: There are eight data lines from pin no 7 to pin no 14 in an LCD.

3. Which pin of the LCD is used for adjusting its contrast?
a) pin no 1
b) pin no 2
c) pin no 3
d) pin no 4

Answer: c
Clarification: Pin no 3 is used for controlling the contrast of the LCD.

4. For writing commands on an LCD, RS bit is
a) set
b) reset
c) set & reset
d) none of the mentioned

Answer: b
Clarification: For writing commands on an LCD, RS pin is reset.

5. Which command of an LCD is used to shift the entire display to the right?
a) 0x1C
b) 0x18
c) 0x05
d) 0x07

Answer: a
Clarification: 0x1C is used to shift the entire display to the right.

6. Which command is used to select the 2 lines and 5*7 matrix of an LCD?
a) 0x01
b) 0x06
c) 0x0e
d) 0x38

Answer: d
Clarification: 0x38 is used to select the 2 lines and 5*7 matrix of an LCD.

7. Which of the following step/s is/are correct for sending data to an LCD?
a) set the R/W bit
b) set the E bit
c) set the RS bit
d) all of the mentioned

Answer: d
Clarification: To send data to an LCD, RS pin should be set so that LCD will come to know that it will receive data which has to display on the screen. R/W pin should be reset as data has to be displayed (i.e. write to the LCD). High to low pulse must be applied to the E pin when data is supplied to data pins of the LCD.

8. Which of the following step/s is/are correct to perform reading operation from an LCD?
a) low to high pulse at E pin
b) R/W pin is set high
c) low to high pulse at E pin & R/W pin is set high
d) none of the mentioned

Answer: c
Clarification: For reading operations, R/W pin should be made high and added to it, a low to high pulse is also generated at the E pin.

9. Which instruction is used to select the first row first column of an LCD?
a) 0x08
b) 0x0c
c) 0x80
d) 0xc0

Answer: c
Clarification: 0x80 is used to select the first row first column of an LCD.

10. The RS pin is _________ for an LCD.
a) input
b) output
c) input & output
d) none of the mentioned

Answer: a
Clarification: The RS pin is an input pin for an LCD.

250+ TOP MCQs on ADC, DAC Interfacing and Answers

AVR Microcontroller Questions and Answers for Freshers on “ADC, DAC Interfacing”.

1. Which of the following is correct about the word resolution in ADC DAC converters in AVR’s?
a) it is the smallest change that can be described by an ADC
b) it is equal to Vref/2n (where n represents the number of bits)
c) it is 0.076mV or 76uV for n=16 and Vref=5V
d) all of the mentioned

Answer: d
Clarification: Resolution is defined as the smallest change in the step size that is described by an ADC, it is equal to Vref/2n.

2. In an ADC, we can calculate the output voltage from the formula
a) Step size / Vin
b) Step size * Vin
c) Vin / step size
d) Vref / step size

Answer: c
Clarification: The output voltage can be calculated by using the formula Vin / step size.

3. ADC0848 is a ____________ bit converter?
a) 16
b) 4
c) 8
d) 48

Answer: c
Clarification: ADC0848 is a 8 bit converter.

4. Which of the following factors can affect the step size calculation?
a) number of bits
b) input current
c) output current
d) all of the mentioned

Answer: a
Clarification: There are mainly two factors that can affect the step size calculation of an ADC converter, they are the number of bits and the Vref voltage.

5. MAX1112 is a _________ type of ADC converter?
a) parallel
b) 12 bit
c) serial
d) all of the mentioned

Answer: c
Clarification: MAX1112 is a serial ADC converter, as it has only one pin for the data output.

6. Why do we connect a capacitor between the Vref and the Gnd pin?
a) to remove the leakage
b) to ensure more current at that place
c) to make more Vref
d) to make Vref stable and also to increase the precision of the ADC

Answer: d
Clarification: A capacitor is connected between the Vref and the Gnd pin in order to stabilize the Vref value and also to increase the precision of the ADc converter.

7. Which of the following are the registers that are used for controlling the ADC conversion in the AVR?
a) ADCSRA
b) ADMUX
c) SPIOR
d) All of the mentioned

Answer: d
Clarification: For programming the ADC conversion in an AVR, we require the following registers. They are ADCSRA, ADMUX, SPIOR. There are two more registers used for handling the output data, they are ADCH and ADCL registers.

8. What is the internal Vref of an Atmega32 series?
a) 5V
b) 3.3V
c) 2.56V
d) all of the mentioned

Answer: c
Clarification: 2.56V is the internal Vref selected for an Atmega32 series based microcontrollers.

9. The output of a DAC0808 is in the form of ____________
a) electrical pulse
b) current
c) voltage
d) all of the mentioned

Answer: b
Clarification: The output of a DAC0808 is in the form of a current.

10. In a DAC the input is ______ and the output is ______
a) analog, digital
b) current, voltage
c) digital, analog
d) analog, current

Answer: c
Clarification: In a DAC, the input is digital and the output is analog in nature.

250+ TOP MCQs on MSP430 TIMER_A and Answers

MSP430 Microcontroller online test on “TIMER_A”.

1. All channels within Timer_A share the same timer block?
a) yes
b) no
c) cant be said
d) depends on the conditions

Answer: a
Clarification: There is only one TAR in Timer_A so all of its channels share the same timer block.

2. Timer_A has _________
a) RTC module in it
b) Compare/ capture channel
c) Communication channel
d) Converter channel

Answer: b
Clarification: Timer_A has compared/ capture channel inbuilt inside it.

3. TACLK and INCLK are _________
a) internally generated clock pulses
b) externally fed clock pulses
c) of no use in Timer_A
d) very slow

Answer: b
Clarification: TACLK and INCLK clock pulses are the externally fed pulses that are required by the Timer_A.

4. In continuous mode of the counter _________
a) counter moves from 0000-ffff
b) counter moves from ffff-0000-ffff
c) counter moves from 0000-ffff and then again returns to 0
d) all of the mentioned

Answer: c
Clarification: In a continuous mode of the counter, the counter firstly increases from 0000-ffff, then after this value the roll over condition comes and it again gets started from 0000. This particular mode is very useful for capturing inputs.

5. TACLR bit in TACTL _________
a) clear the interrupt flag
b) clear the status flags
c) clear the count in TAR
d) all of the mentioned

Answer: c
Clarification: TACLR bit in TACTL clears the count in the TAR.

6. TAxCCTLn is a _________
a) set of 2 bits used for selecting the mode of operation of the timer
b) a register of 8 bits used for giving the count to the timer
c) a register of 16 bits used to select the compare/capture channel of the Timer_Ax
d) a register of 16 bits used to cause the timer interrupt

Answer: c
Clarification: TAxCCTLn is a register of 16 bits used to select the compare/capture channel of the Timer_Ax.

7. CCI1B comes from _________
a) ACLK
b) CAOUT
c) SCLK
d) TACLK

Answer: b
Clarification: CCI1B comes from CAOUT.

8. Which of the following parameters are given by the TAxCCRn?
a) Capture/compare input. The selected input signal can be read by this bit
b) Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read from this bit
c) Holds the data for the comparison to the timer value in the Timer_A Register, TAR
d) None of the mentioned

Answer: c
Clarification: Compare mode: TAxCCRn holds the data for the comparison to the timer value in the Timer_A Register, TAR.
Capture mode: The Timer_A Register, TAR, is copied into the TAxCCRn register when capture is performed.