Digital Electronics/Circuits Multiple Choice Questions on “Compatibility or Interfacing”.
1. Compatibility refers to ____________
A. The output of a circuit should match with the input of another circuit
B. The output of a circuit should match with the input of the same circuit
C. The input of a circuit should match with the output of another circuit
D. The input of a circuit should match with the output of same circuit
Answer: A
Clarification: The output(s) of a circuit or a system should match the input(s) of another circuit or system that has different electrical characteristics. This is referred to as compatibility.
2. The method of connecting a driving device to a loading device is known as ___________
A. Compatibility
B. Interface
C. Sourcing
D. Sinking
Answer: B
Clarification: The method of connecting a driving device to a loading device is known as interface. The output(s) of a circuit or a system should match the input(s) of another circuit or system that has different electrical characteristics. This is referred to as compatibility.
3. The first CML logic was introduced by General Electric in ___________
A. 1960
B. 1981
C. 1961
D. 1990
Answer: C
Clarification: CML stands for Current Mode Logic. The first CML logic was introduced by General Electric in 1961.
4. Commercial ECL families are not nearly as popular as TTL and CMOS mainly because they ___________
A. Produces too much noise
B. Consume too much power
C. Have high fan-in
D. Have high fan-out
Answer: B
Clarification: Commercial ECL families are not nearly as popular as TTL and CMOS mainly because they consume too much power. CMOS consumes the least power while TTL provides high speed.
5. The key to propagation delay in bipolar logic family is to prevent the transistors in a gate from ___________
A. Fan-in
B. Fan-out
C. Saturation
D. Cut-off
Answer: C
Clarification: The key to propagation delay in bipolar logic family is to prevent the transistors in a gate from saturation. In Saturation mode, the transistor is in “ON”mode, where it seems like a short circuit between collector and emitter.
6. Schottky families prevent the saturating using ___________
A. Transistors
B. Schottky transistors
C. Diodes
D. Schottky diodes
Answer: D
Clarification: Schottky families prevent the saturating using Schottky diodes across the base-collector junctions of transistors. In Saturation mode, the transistor is in “ON”mode, where it seems like a short circuit between collector and emitter.
7. The basic idea of basic CML circuit came from an ___________
A. Inverter
B. Buffer
C. Transistor
D. Both inverter and buffer
Answer: D
Clarification: CML is Current Mode Logic in which data is transmitted at high speed of Mbps. Since this circuit has both inverting and non-inverting output. So, It behaves like an inverter/buffer.
8. The full form of MECL is ___________
A. Mono emitter coupled logic
B. Motorola emitter coupled logic
C. Motorola emitter capacitor logic
D. Both mono emitter and motorola coupled logic
Answer: B
Clarification: The full form of MECL is Motorola emitter coupled logic. ECL is a high speed BJT. It uses BJT differential amplifier with single input and restricted current to avoid the transistor going into saturation and thus turning off operation.
9. Motorola has offered MECL circuits in ______ logic families.
A. 3
B. 4
C. 5
D. 6
Answer: C
Clarification: Motorola has offered MECL circuits in five logic families: MECL I, MECL II, MECL III, MECL 10000 (MECL 10K) and MECL 10H000 (MECL 10KH). The full form of MECL is Motorola emitter coupled logic. ECL is a high speed BJT. It uses BJT differential amplifier with single input and restricted current to avoid the transistor going into saturation and thus turning off operation.
10. The latest entrant to the ECL family is ___________
A. ECL 10K
B. ECL 100K
C. ECL 1000K
D. ECL 10000K
Answer: B
Clarification: The latest entrant to the ECL family is ECL 100K, having 6-digit part numbers. This family offers functions, in general, different from those offered by 10K series. This family operates with a reduced power supply voltage -4.5 V, has shorter propagation delay of 0.75 ns, and transition time of 0.7 ns. However, the power consumption per gate is about 40 mW.
11. All input of NOR as low produces result as ___________
A. Low
B. Mid
C. High
D. High Impedance
Answer: C
Clarification: According to the properties of NOR gate, if all the input of NOR as low produces a result as high. While if any input of NOR is high, then it produces low output.
12. In RTL NOR gate, the output is at logic 1 only when all the inputs are at ___________
A. logic 0
B. logic 1
C. +10v
D. floating
Answer: A
Clarification: RTL NOR gate behaves as NOR gate and the output of NOR gate will be 1 only when all the inputs are at logic 0. The output of NOR will be 0 if any of the input is 1.