Digital Electronics/Circuits Multiple Choice Questions on “Master-Slave Flip-Flops”.
1. The asynchronous input can be used to set the flip-flop to the ____________
A. 1 state
B. 0 state
C. either 1 or 0 state
D. forbidden State
Answer: C
Clarification: The asynchronous input can be used to set the flip-flop to the 1 state or clear the flip-flop to the 0 state at any time, regardless of the condition at the other inputs.
2. Input clock of RS flip-flop is given to ____________
A. Input
B. Pulser
C. Output
D. Master slave flip-flop
Answer: B
Clarification: Pulser behaves like an arithmetic operator, to perform the operation or determination of corresponding states.
3. D flip-flop is a circuit having ____________
A. 2 NAND gates
B. 3 NAND gates
C. 4 NAND gates
D. 5 NAND gates
Answer: C
Clarification: D flip-flop is a circuit having 4 NAND gates. Two of them are connected with each other.
4. In JK flip flop same input, i.e. at a particular time or during a clock pulse, the output will oscillate back and forth between 0 and 1. At the end of the clock pulse the value of output Q is uncertain. The situation is referred to as?
A. Conversion condition
B. Race around condition
C. Lock out state
D. Forbidden State
Answer: B
Clarification: A race around condition is a flaw in an electronic system or process whereby the output and result of the process is unexpectedly dependent on the sequence or timing of other events.
5. Master slave flip flop is also referred to as?
A. Level triggered flip flop
B. Pulse triggered flip flop
C. Edge triggered flip flop
D. Edge-Level triggered flip flop
Answer: B
Clarification: The term pulse triggered means the data is entered on the rising edge of the clock pulse, but the output does not reflect the change until the falling edge of the clock pulse.
6. In a positive edge triggered JK flip flop, a low J and low K produces?
A. High state
B. Low state
C. Toggle state
D. No Change State
Answer: D
Clarification: In JK Flip Flop if J = K = 0 then it holds its current state. There will be no change.
7. If one wants to design a binary counter, the preferred type of flip-flop is ____________
A. D type
B. S-R type
C. Latch
D. J-K type
Answer: D
Clarification: If one wants to design a binary counter, the preferred type of flip-flop is J-K type because it has capability to recover from toggle condition. SR flip-flop is not suitable as it produces the “Invalid State”.
8. S-R type flip-flop can be converted into D type flip-flop if S is connected to R through ____________
A. OR Gate
B. AND Gate
C. Inverter
D. Full Adder
Answer: C
Clarification: S-R type flip-flop can be converted into D type flip-flop if S is connected to R through an Inverter gate.
9. Which of the following flip-flops is free from the race around the problem?
A. T flip-flop
B. SR flip-flop
C. Master-Slave Flip-flop
D. D flip-flop
Answer: A
Clarification: T flip-flop is free from the race around condition because its output depends only on the input; hence there is no any problem creates as like toggle.
10. Which of the following is the Universal Flip-flop?
A. S-R flip-flop
B. J-K flip-flop
C. Master slave flip-flop
D. D Flip-flop
Answer: B
Clarification: There are lots of flip-flops can be prepared by using J-K flip-flop. So, the name is a universal flip-flop. Also, the JK flip-flop resolves the Forbidden State.
11. How many types of triggering take place in a flip flops?
A. 3
B. 2
C. 4
D. 5
Answer: A
Clarification: There are three types of triggering in a flip-flop, viz., level triggering, edge triggering and pulse triggering.
12. Flip-flops are ____________
A. Stable devices
B. Astable devices
C. Bistable devices
D. Monostable devices
Answer: C
Clarification: Flip-flops are synchronous bistable devices known as bistable multivibrators as they have 2 stable states.
13. The term synchronous means ____________
A. The output changes state only when any of the input is triggered
B. The output changes state only when the clock input is triggered
C. The output changes state only when the input is reversed
D. The output changes state only when the input follows it
Answer: B
Clarification: The term synchronous means the output changes state only when the clock input is triggered. That is, changes in the output occur in synchronization with the clock.
14. The S-R, J-K and D inputs are called ____________
A. Asynchronous inputs
B. Synchronous inputs
C. Bidirectional inputs
D. Unidirectional inputs
Answer: B
Clarification: The S-R, J-K and D inputs are called synchronous inputs because data on these inputs are transferred to the flip-flop’s output only on the triggering edge or level triggering of the clock pulse. Moreover, flip-flops have a clock input whereas latches don’t. Hence, known as synchronous inputs.
15. The circuit that generates a spike in response to a momentary change of input signal is called ____________
A. R-C differentiator circuit
B. L-R differentiator circuit
C. R-C integrator circuit
D. L-R integrator circuit
Answer: A
Clarification: The circuit that generates a spike in response to a momentary change of input signal is called R-C differentiator circuit.