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8086 Microprocessor Multiple Choice Questions
1. A microprocessor is a _______ chip integrating all the functions of a CPU of a computer.
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a. multiple
B. single
c. double
d. triple
Answer:
b. single
2. Microprocessor is a/an _______ circuit that functions as the CPU of the compute
a. electronic
B. mechanic
c. integrating
d. processing
Answer:
a. electronic
3. Microprocessor is the ______ of the computer and it perform all the computational tasks
a. main
B. heart
c. important
d. simple
Answer:
b. heart
4. The purpose of the microprocessor is to control ______
a. memory
B. switches
c. processing
d. tasks
Answer:
a. memory
5. The first digital electronic computer was built in the year________
a. 1950
B. 1960
c. 1940
d. 1930
Answer:
c. 1940
6. In 1960’s texas institute invented ______
a. integrated circuits
B. microprocessor
c. vacuum tubes
d. transistors
Answer:
a. integrated circuits
7. The intel 8086 microprocessor is a _______ processor
a. 8 bit
B. 16 bit
c. 32 bit
d. 4 bit
Answer:
b. 16 bit
8. The microprocessor can read/write 16 bit data from or to ________
a. memory
B. i /o device
c. processor
d. register
Answer:
a. memory
9. The work of EU is ________
a. encoding
B. decoding
c. processing
d. calculations
Answer:
b. decoding
10. The 16 bit flag of 8086 microprocessor is responsible to indicate ___________
a. the condition of result of alu operation
B. the condition of memory
c. the result of addition
d. the result of subtraction
Answer:
a. the condition of result of alu operation
11. The CF is known as ________
a. carry flag
B. condition flag
c. common flag
d. single flag
Answer:
a. carry flag
12. The SF is called as ________
a. service flag
B. sign flag
c. single flag
d. condition flag
Answer:
b. sign flag
13. The OF is called as _______
a. overflow flag
B. overdue flag
c. one flag
d. over flag
Answer:
a. overflow flag
14. The IF is called as _________
a. initial flag
B. indicate flag
c. interrupt flag
d. inter flag
Answer:
c. interrupt flag
15. The register AX is formed by grouping ________
a. ah & al
B. bh & bl
c. ch & cl
d. dh & dl
Answer:
a. ah & al
16. The SP is indicated by ________
a. single pointer
B. stack pointer
c. source pointer
d. destination pointer
Answer:
b. stack pointer
17. The BP is indicated by _______
a. base pointer
B. binary pointer
c. bit pointer
d. digital pointer
Answer:
a. base pointer
18. The SS is called as ________
a. single stack
B. stack segment
c. sequence stack
d. random stack
Answer:
b. stack segment
19. The index register are used to hold _______
a. memory register
B. offset address
c. segment memory
d. offset memory
Answer:
a. memory register
20. The BIU contains FIFO register of size __________ bytes
a. 8
B. 6
c. 4
d. 12
Answer:
b. 6
21. The BIU prefetches the instruction from memory and store them in ________
a. queue
B. register
c. memory
d. stack
Answer:
a. queue
22. The 1 MB byte of memory can be divided into ______ segment
a. 1 kbyte
B. 64 kbyte
c. 33 kbyte
d. 34 kbyte
Answer:
b. 64 kbyte
23. The DS is called as _______
a. data segment
B. digital segment
c. divide segment
d. decode segment
Answer:
a. data segment
24. The CS register stores instruction _____________ in code segment
a. stream
B. path
c. codes
d. stream line
Answer:
c. codes
25. The IP is ________ bits in length
a. 8 bits
B. 4 bits
c. 16 bits
d. 32 bits
Answer:
c. 16 bits
26. The push source copies a word from source to ______
a. stack
B. memory
c. register
d. destination
Answer:
a. stack
27. LDs copies to consecutive words from memory to register and ___________
a. es
B. ds
c. ss
d. cs
Answer:
b. ds
28. INC destination increments the content of destination by _______
a. 1
B. 2
c. 30
d. 41
Answer:
a. 1
29. IMUL source is a signed _________
a. multiplication
B. addition
c. subtraction
d. division
Answer:
a. multiplication
30. _________destination inverts each bit of destination
a. not
B. nor
c. and
d. or
Answer:
a. not
31. The JS is called as ______
a. jump the signed bit
B. jump single bit
c. jump simple bit
d. jump signal it
Answer:
a. jump the signed bit
32. Instruction providing both segment base and offset address are called _____
a. below type .
B. far type
c. low type
d. high type
Answer:
b. far type
33. The conditional branch instruction specify ___________ for branching
a. conditions
B. instruction
c. address
d. memory
Answer:
a. conditions
34. ______
a. carry flag
B. conditional flag
c. common flag
d. sign flag
Answer:
b. conditional flag
35. The LES copies to words from memory to register and __________
a. ds
B. cs
c. es
d. ds
Answer:
c. es
36. The _________ translates a byte from one code to another code
a. xlat
B. xchng
c. pop
d. push
Answer:
a. xlat
37. The _______ contains an offset instead of actual address
a. sp
B. ip
c. es
d. ss
Answer:
b. ip
38. The 8086 fetches instruction one after another from __________ of memory
a. code segment
B. ip
c. es
d. ss
Answer:
a. code segment
39. The BIU contains FIFO register of size 6 bytes called _____.
a. queue
B. stack
c. segment
d. register
Answer:
a. queue
40. Signal
a. ur signal
B. vcc
c. aie
d. ground
Answer:
a. ur signal
41. The pin of minimum mode AD0-AD15 has ____________ address
a. 16 bit
B. 20 bit
c. 32 bit
d. 4 bit
Answer:
b. 20 bit
42. The pin of minimum mode AD0- AD15 has _________ data bus
a. 4 bit
B. 20 bit
c. 16 bit
d. 32 bit
Answer:
c. 16 bit
43. The address bits are sent out on lines through __________
a. a16-19
B. a0-17
c. d0-d17
d. c0-c17
Answer:
a. a16-19
44. ________ is used to write into memory
a. rd
B. wr
c. rd / wr
d. clk
Answer:
b. wr
45. The functions of Pins from 24 to 31 depend on the mode in which _______ is operating
a. 8085
B. 8086
c. 80835
d. 80845
Answer:
b. 8086
46. The RD, WR, M/IO is the heart of control for a __________ mode
a. minimum
B. maximum
c. compatibility mode
d. control mode
Answer:
a. minimum
47. In a minimum mode there is a ___________ on the system bus
a. single
B. double
c. multiple
d. triple
Answer:
a. single
48. If MN/MX is low the 8086 operates in __________ mode
a. minimum
B. maximum
c. both (a) and (b)
d. medium
Answer:
b. maximum
49. In max mode, control bus signal So,S1 and S2 are sent out in ____________ form
a. decoded
B. encoded
c. shared
d. unshared
Answer:
b. encoded
50. The ___ bus controller device decodes the signals to produce the control bus signal
a. internal
B. data
c. external
d. address
Answer:
c. external
51. interrupted program
a. forward
B. return
c. data
d. line
Answer:
b. return
52. The main concerns of the ___________ are to define a flexible set of commands
a. memory interface
B. peripheral interface
c. both (a) and (b)
d. control interface
Answer:
a. memory interface
53. and write into register
a. multiprocessor
B. microprocessor
c. dual processor
d. coprocessor
Answer:
b. microprocessor
54. To perform any operations, the Mp should identify the __________
a. register
B. memory
c. interface
d. system
Answer:
a. register
55. The Microprocessor places __________ address on the address bus
a. 4 bit
B. 8 bit
c. 16 bit
d. 32 bit
Answer:
c. 16 bit
56. register should be selected
a. address
B. one
c. two
d. three
Answer:
b. one
57. The ________of the memory chip will identify and select the register for the EPROM
a. internal decoder
B. external decoder
c. address decoder
d. data decoder
Answer:
a. internal decoder
58. Microprocessor provides signal like ____ to indicate the read operatio
a. low
B. mcmw
c. mcmr
d. mcmwr
Answer:
c. mcmr
59. must be added to address lines of the _______ chip.
a. single
B. memory
c. multiple
d. triple
Answer:
b. memory
60. The remaining address line of ______ bus is decoded to generate chip select signal
a. data
B. address
c. control bus
d. both (a) and (b)
Answer:
b. address
61. _______ signal is generated by combining RD and WR signals with IO/M
a. control
B. memory
c. register
d. system
Answer:
a. control
62. Memory is an integral part of a _______ system
a. supercomputer
B. microcomputer
c. mini computer
d. mainframe computer
Answer:
b. microcomputer
63. _____ has certain signal requirements write into and read from its registers
a. memory
B. register
c. both (a) and (b)
d. control
Answer:
a. memory
64. An _________ is used to fetch one address
a. internal decoder
B. external decoder
c. encoder
d. register
Answer:
a. internal decoder
65. The primary function of the _____________ is to accept data from I/P devices
a. multiprocessor
B. microprocessor
c. peripherals
d. interfaces
Answer:
b. microprocessor
66. ___________ signal prevent the microprocessor from reading the same data more than one
a. pipelining
B. handshaking
c. controlling
d. signaling
Answer:
b. handshaking
67. Bits in IRR interrupt are ______
a. reset
B. set
c. stop
d. start
Answer:
b. set
68. __________ generate interrupt signal to microprocessor and receive acknowledge
a. priority resolver
B. control logic
c. interrupt request register
d. interrupt register
Answer:
b. control logic
69. The _______ pin is used to select direct command word
a. a0
B. d7-d6
c. a12
d. ad7-ad6
Answer:
a. a0
70. The _______ is used to connect more microprocessor
a. peripheral device
B. cascade
c. i/o devices
d. control unit
Answer:
b. cascade
71. CS connect the output of ______
a. encoder
B. decoder
c. slave program
d. buffer
Answer:
b. decoder
72. In which year, 8086 was introduced?
a. 1978
B. 1979
c. 1977
d. 1981
Answer:
a. 1978
73. Expansion for HMOS technology_______
a. high level mode oxygen semiconductor
B. high level metal oxygen semiconductor
c. high performance medium oxide semiconductor
d. high performance metal oxide semiconductor
Answer:
d. high performance metal oxide semiconductor
74. 8086 and 8088 contains _______ transistors
a. 29000
B. 24000
c. 34000
d. 54000
Answer:
a. 29000
75. ALE stands for ___________
a. address latch enable
B. address level enable
c. address leak enable
d. address leak extension
Answer:
a. address latch enable
76. What is DEN?
a. direct enable
B. data entered
c. data enable
d. data encoding
Answer:
c. data enable
77. In 8086, Example for Non maskable interrupts are ________.
a. trap
B. rst6.5
c. intr
d. rst6.6
Answer:
a. trap
78. In 8086 the overflow flag is set when _____________.
a. the sum is more than 16 bits.
B. signed numbers go out of their range after an arithmetic operation.
c. carry and sign flags are set.
d. subtraction
Answer:
b. signed numbers go out of their range after an arithmetic operation.
79. In 8086 microprocessor the following has the highest priority among all type interrupts?
a. nmi
B. div 0
c. type 255
d. over flow
Answer:
a. nmi
80. In 8086 microprocessor one of the following statements is not true?
a. coprocessor is interfaced in max mode.
B. coprocessor is interfaced in min mode.
c. i /o can be interfaced in max / min mode.
d. supports pipelining
Answer:
b. coprocessor is interfaced in min mode.
81. Address line for TRAP is?
a. 0023h
B. 0024h
c. 0033h
d. 0099h
Answer:
b. 0024h
82. Access time is faster for _________.
a. rom
B. sram
c. dram
d. eram
Answer:
b. sram
83. The First Microprocessor was__________.
a. intel 4004
B. 8080
c. 8085
d. 4008
Answer:
a. intel 4004
84. Status register is also called as ___________.
a. accumulator
B. stack
c. counter
d. flags
Answer:
d. flags
85. Which of the following is not a basic element within the microprocessor?
a. microcontroller
B. arithmetic logic unit (alu)
c. register array
d. control unit
Answer:
a. microcontroller
86. Which method bypasses the CPU for certain types of data transfer?
a. software interrupts
B. interrupt-driven i/o
c. polled i/o
d. direct memory access (dma)
Answer:
d. direct memory access (dma)
87. The first microprocessor had a(n)________.
a. 1 – bit data bus
B. 2 – bit data bus
c. 4 – bit data bus
d. 8 – bit data bus
Answer:
c. 4 – bit data bus
88. Which microprocessor has multiplexed data and address lines?
a. 8086
B. 80286
c. 80386
d. pentium
Answer:
a. 8086
89. Which is not an operand?
a. variable
B. register
c. memory location
d. assembler
Answer:
d. assembler
90. A 20-bit address bus can locate ________.
a. 1,048,576 locations
B. 2,097,152 locations
c. 4,194,304 locations
d. 8,388,608 locations
Answer:
a. 1,048,576 locations
91. Which of the following is not an arithmetic instruction?
a. inc (increment)
B. cmp (compare)
c. dec (decrement)
d. rol (rotate left)
Answer:
d. rol (rotate left)
92. During a read operation the CPU fetches ________.
a. a program instruction
B. another address
c. data itself
d. all of the above
Answer:
d. all of the above
93. Which of the following is not an 8086/8088 general-purpose register?
a. code segment (cs)
B. data segment (ds)
c. stack segment (ss)
d. address segment (as)
Answer:
d. address segment (as)
94. A 20-bit address bus allows access to a memory of capacity
a. 1 mb
B. 2 mb
c. 4 mb
d. 8 mb
Answer:
a. 1 mb
95. Which microprocessor accepts the program written for 8086 without any changes?
a. 8085
B. 8086
c. 8087
d. 8088
Answer:
d. 8088
96. Which group of instructions do not affect the flags?
a. arithmetic operations
B. logic operations
c. data transfer operations
d. branch operations
Answer:
c. data transfer operations
97. The result of MOV AL, 65 is to store
a. store 0100 0010 in al
B. store 42h in al
c. store 40h in al
d. store 0100 0001 in al
Answer:
d. store 0100 0001 in al
98. Which is not part of the execution unit (EU)?
a. arithmetic logic unit (alu)
B. clock
c. general registers
d. flags
Answer:
b. clock
99. A microprocessor is a chip integrating all the functions of a CPU of a computer.
a. multiple
B. single
c. double
d. triple
Answer:
b. single
100. Microprocessor is a/an circuit that functions as the CPU of the compute
a. electronic
B. mechanic
c. integrating
d. processing
Answer:
a. electronic