250+ TOP MCQs on Karnaugh Map and Answers

Digital Electronics/Circuits Multiple Choice Questions on “Karnaugh Map”.

1. A Karnaugh map (K-map) is an abstract form of ____________ diagram organized as a matrix of squares.
A. Venn Diagram
B. Cycle Diagram
C. Block diagram
D. Triangular Diagram
Answer: A
Clarification: A Karnaugh map (K-map) is an abstract form of Venn diagram organized as a matrix of squares, where each square represents a Maxterm or a Minterm.

2. There are ______ cells in a 4-variable K-map.
A. 12
B. 16
C. 18
D. 8
Answer: B
Clarification: There are 16 = (24) cells in a 4-variable K-map.

3. The K-map based Boolean reduction is based on the following Unifying Theorem: A + A’ = 1.
A. Impact
B. Non Impact
C. Force
D. Complementarity
Answer: B
Clarification: The given expression A +A’ = 1 is based on non-impact unifying theorem.

4. Each product term of a group, w’.x.y’ and w.y, represents the ____________ in that group.
A. Input
B. POS
C. Sum-of-Minterms
D. Sum of Maxterms
Answer: C
Clarification: In a minterm, each variable w, x or y appears once either as the variable itself or as the inverse. So, the given expression satisfies the property of Sum of Minterm.

5. The prime implicant which has at least one element that is not present in any other implicant is known as ___________
A. Essential Prime Implicant
B. Implicant
C. Complement
D. Prime Complement
Answer: A
Clarification: Essential prime implicants are prime implicants that cover an output of the function that no combination of other prime implicants is able to cover.

6. Product-of-Sums expressions can be implemented using ___________
A. 2-level OR-AND logic circuits
B. 2-level NOR logic circuits
C. 2-level XOR logic circuits
D. Both 2-level OR-AND and NOR logic circuits
Answer: D
Clarification: Product-of-Sums expressions can be implemented using 2-level OR-AND & NOR logic circuits.

7. Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given ___________
A. Function
B. Value
C. Set
D. Word
Answer: A
Clarification: Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given function.

8. Don’t care conditions can be used for simplifying Boolean expressions in ___________
A. Registers
B. Terms
C. K-maps
D. Latches
Answer: C
Clarification: Don’t care conditions can be used for simplifying Boolean expressions in K-maps which helps in pairing with 1/0.

9. It should be kept in mind that don’t care terms should be used along with the terms that are present in ___________
A. Minterms
B. Expressions
C. K-Map
D. Latches
Answer: A
Clarification: It should be kept in mind that don’t care terms should be used along with the terms that are present in minterms as well as maxterms which reduces the complexity of the boolean expression.

10. Using the transformation method you can realize any POS realization of OR-AND with only.
A. XOR
B. NAND
C. AND
D. NOR
Answer: D
Clarification: Using the transformation method we can realize any POS realization of OR-AND with only NOR.

11. There are many situations in logic design in which simplification of logic expression is possible in terms of XOR and _________________ operations.
A. X-NOR
B. XOR
C. NOR
D. NAND
Answer: A
Clarification: There are many situations in logic design in which simplification of logic expression is possible in terms of XOR and XNOR operations.
Expression of XOR : AB’ + A’B
Expression of XNOR : AB + A’B’

12. These logic gates are widely used in _______________ design and therefore are available in IC form.
A. Sampling
B. Digital
C. Analog
D. Systems
Answer: B
Clarification: These logic gates(XOR, XNOR, NOR) are widely used in digital design and therefore are available in IC form as digital circuits deal with data transmission in the form of binary digits.

13. In case of XOR/XNOR simplification we have to look for the following _______________
A. Diagonal Adjacencies
B. Offset Adjacencies
C. Straight Adjacencies
D. Both diagonal and offset adjencies
Answer: D
Clarification: In case of XOR/XNOR simplification we have to look for the following diagonal and offset adjacencies. XOR gives output 1 when odd number of 1s are present in input while XNOR gives output 1 when even number of 1s or all 0s are present in input.

14. Entries known as _______________ mapping.
A. Diagonal
B. Straight
C. K
D. Boolean
Answer: A
Clarification: Entries known as diagonal mapping. The diagonal mapping holds true when for any relation, there is a projection of product on the factor.

250+ TOP MCQs on Introduction of Arithmetic Operation and Answers

Digital Electronics/Circuits Multiple Choice Questions on “Introduction of Arithmetic Operation”.

1. The basic building blocks of the arithmetic unit in digital computers are __________
A. Subtractors
B. Adders
C. Multiplexer
D. Comparator
Answer: B
Clarification: The basic building blocks of the arithmetic unit in digital computers are adders. Since a parallel adder is constructed with a number of full-adder circuits connected in cascade. By controlling the data inputs to the parallel adder, it is possible to obtain different types of arithmetic operations.

2. A digital system consists of _____ types of circuits.
A. 2
B. 3
C. 4
D. 5
Answer: A
Clarification: A digital system consists of two types of circuits and these are a combinational and sequential logic circuit. Combinational circuits are the ones which do not depend on previous inputs while Sequential circuits depend on past inputs.

3. In a combinational circuit, the output at any time depends only on the _______ at that time.
A. Voltage
B. Intermediate values
C. Input values
D. Clock pulses
Answer: C
Clarification: In a combinational circuit, the output at any time depends only on the input values at that time and not on past or intermediate values.

4. In a sequential circuit, the output at any time depends only on the input values at that time.
A. Past output values
B. Intermediate values
C. Both past output and present input
D. Present input values
Answer: C
Clarification: In a sequential circuit, the output at any time depends on the present input values as well as past output values. It also depends on clock pulses depending on whether it’s synchronous or asynchronous sequential circuits.

5. Procedure for the design of combinational circuits are:

A. From the word description of the problem, identify the inputs and outputs and draw a block diagram.
B. Draw the truth table such that it completely describes the operation of the circuit for different 
combinations of inputs.
C. Simplify the switching expression(s) for the output(s).
D. Implement the simplified expression using logic gates.
E. Write down the switching expression(s) for the output(s).

A. B, C, D, E, A
B. A, D, E, B, C
C. A, B, E, C, D
D. B, A, E, C, D
Answer: C
Clarification: Combinational circuits are the ones which do not depend on previous inputs and depends only on the present values. The given arrangement A, B, E, C, D is the right sequence for the designing of the combinational circuits.

6. All logic operations can be obtained by means of __________
A. AND and NAND operations
B. OR and NOR operations
C. OR and NOT operations
D. NAND and NOR operations
Answer: D
Clarification: Since the logic gates NOR and NAND are known as universal logic gates, therefore it can be used to design all the three basic gates AND, OR and NOT. Thus, it means that any operations can be obtained by implementation of these gates.

7. The design of an ALU is based on __________
A. Sequential logic
B. Combinational logic
C. Multiplexing
D. De-Multiplexing
Answer: B
Clarification: The design of an ALU is based on combinational logic. Because the unit has a regular pattern, it can be broken into identical stages connected in cascade through carries.

8. If the two numbers are unsigned, the bit conditions of interest are the ______ carry and a possible _____ result.
A. Input, zero
B. Output, one
C. Input, one
D. Output, zero
Answer: D
Clarification: If the two numbers are unsigned, the bit conditions of interest are the output carry and a possible zero result.

9. If the two numbers include a sign bit in the highest order position, the bit conditions of interest are the sign of the result, a zero indication and __________
A. An underflow condition
B. A neutral condition
C. An overflow condition
D. One indication
Answer: C
Clarification: If the two numbers include a sign bit in the highest order position, the bit conditions of interest are the sign of the result, a zero indication and an overflow condition.

10. The flag bits in an ALU is defined as ___________
A. The total number of registers
B. The status bit conditions
C. The total number of control lines
D. All of the Mentioned
Answer: B
Clarification: In an ALU, status bit conditions are sometimes called condition code bits or flag bits. It is so called because they tend to represent the status of the respect flags after any operation.

250+ TOP MCQs on Liquid Crystal Displays and Answers

Digital Electronics/Circuits Multiple Choice Questions on “Liquid Crystal Displays”.

1. The full form of LCD is ____________
A. Liquid Crystal Display
B. Liquid Crystalline Display
C. Logical Crystal Display
D. Logical Crystalline Display

Answer: A
Clarification: The full form of LCD is “Liquid Crystal Display”. They provide thinner displays as compared to Cathode Ray Tubes.

2. The optical properties of liquid crystals depend on the direction of ___________
A. Air
B. Solid
C. Light
D. Water

Answer: C
Clarification: The optical properties of liquid crystals depend on the direction of light travels through a layer of the material.

3. By which properties, the orientation of molecules in a layer of liquid crystals can be changed?
A. Magnetic field
B. Electric field
C. Electromagnetic field
D. Gallois field

Answer: B
Clarification: In LCD, the electric field is induced by a small electric voltage applied across it; Due to which the orientation of molecules in a layer of liquid crystals can be changed.

4. Electro-optical effect is produced in ___________
A. LED
B. LCD
C. OFC
D. OLED

Answer: B
Clarification: An electric field (induced by a small electric voltage) can change the orientation of molecules in a layer of liquid crystal and thus affect its optical properties. Such a process is termed an electro-optical effect, and it forms the basis for LCDs.

5. The direction of electric field in an LCD is determined by ___________
A. the molecule’s chemical structure
B. Crystalline surface structure
C. Molecular Orbital Theory
D. Quantum Cellular Automata

Answer: A
Clarification: For LCDs, the change in optical properties results from orienting the molecular axes either along or perpendicular to the applied electric field, the preferred direction being determined by the details of the molecule’s chemical structure.

6. The first LCDs became commercially available in ___________
A. 1950s
B. 1980s
C. 1960s
D. 1970s

Answer: C
Clarification: The first LCDs became commercially available in the late 1960s and were based on a light-scattering effect known as the dynamic scattering mode.

7. LCDs operate from a voltage ranges from ___________
A. 3 to 15V
B. 10 to 15V
C. 10V
D. 5V

Answer: A
Clarification: LCDs operate from a voltage ranges from 3 to 15V rms. They provide thinner displays as compared to Cathode Ray Tubes.

8. LCDs operate from a frequency ranges from ___________
A. 10Hz to 60Hz
B. 50Hz to 70Hz
C. 30Hz to 60Hz
D. None of the Mentioned

Answer: C
Clarification: LCDs operate from a frequency ranges from 30Hz to 60Hz. LCDs operate from a voltage ranges from 3 to 15V rms. They provide thinner displays as compared to Cathode Ray Tubes.

9. In 7 segment display, how many LEDs are used?
A. 8
B. 7
C. 10
D. 9

Answer: B
Clarification: There are 7 LEDs used in a 7 segment display. 7 segment displays are used for displaying decimal numerals which are comparatively convenient to dot matrix displays.

10. What is the backplane in LCD?
A. The ac voltage applied between segment and a common element
B. The dc voltage applied between segment and a common element
C. The amount of power consumed
D. For adjusting the intensity of the LCD

Answer: A
Clarification: The ac voltage applied between the segment and a common element is called the backplane(bp). In which each segment is driven by an EX-OR gate.

250+ TOP MCQs on Counter ICs and Answers

Digital Electronics/Circuits Multiple Choice Questions on “Counter ICs”.

1. What is the difference between a 7490 and a 7493?
A. 7490 is a MOD-10, 7493 is a MOD-16
B. 7490 is a MOD-16, 7493 is a MOD-10
C. 7490 is a MOD-12, 7493 is a MOD-16
D. 7490 is a MOD-10, 7493 is a MOD-12
Answer: A
Clarification: The difference between a 7490 and a 7493 is that 7490 is a MOD-10, 7493 is a MOD-16 counter. Thus, 7490 traverses 10 states and 7493 traverses 16 states.

2. How many different states does a 2-bit asynchronous counter have?
A. 1
B. 4
C. 2
D. 8
Answer: B
Clarification: For a n-bit counter, total number of states = 2n. Thus, for 2-bit counter, total number of states = 22 = 4.

3. A 12 MHz clock frequency is applied to a cascaded counter containing a modulus-5 counter, a modulus-8 counter, and a modulus-10 counter. The lowest output frequency possible is ________
A. 10 kHz
B. 20 kHz
C. 30 kHz
D. 60 kHz
Answer: C
Clarification: Cascaded counter containing a modulus-5 counter, a modulus-8 counter, and a modulus-10 counter. So, 5*8*10=400. Applied clock frequency = 12 MHz; hence, the lowest output frequency possible is 12MHz/400=30 kHz.

4. Which one is a 4-bit binary ripple counter?
A. IC 7493
B. IC 7490
C. IC 7491
D. IC 7492
Answer: B
Clarification: IC 7493 is a 4-bit binary ripple counter. It is a MOD-16 counter with 24 = 16 states.

5. IC 7493 consist of ____________
A. 4 S-R flip-flop
B. 4 J-K flip-flop
C. 4 master-slave flip-flop
D. 4 D flip-flop
Answer: C
Clarification: IC 7493 consist of 4 J-K master-slave flip-flop. It is a MOD-16 counter with 24 = 16 states.
digital-circuits-questions-answers-counter-ics-q5

6. A reset input is used in IC 7493, why?
A. For increment of bit by 1
B. For decrement of bit by 1
C. For reset the counter
D. For setting the counter
Answer: C
Clarification: The reset inputs are used to reset the counter to 0000.

7. In a 4-bit binary ripple counter, four master-slave flip-flops are internally connected to provide a ________ bit counter.
A. Divide-by-2 & divide-by-6
B. Divide-by-6 & divide-by-8
C. Divide-by-2 & divide-by-8
D. Divide-by-4 & divide-by-8
Answer: C
Clarification: In a 4-bit binary ripple counter, four master-slave flip-flops are internally connected to provide a Divide-by-2 & divide-by-8 bit counter.
digital-circuits-questions-answers-counter-ics-q7

8. Which of the following is a decade counter?
A. IC 7493
B. IC 7490
C. IC 7491
D. IC 7492
Answer: B
Clarification: IC 7490 is called as decade counter or MOD-10. Thus, it has 10 states.

9. In a 4-bit decade counter, four master-slave flip-flops are internally connected to provide a ________ bit counter.
A. Divide-by-2 & divide-by-6
B. Divide-by-6 & divide-by-8
C. Divide-by-2 & divide-by-5
D. Divide-by-4 & divide-by-8
Answer: C
Clarification: In a decade counter, four master-slave flip-flops are internally connected to provide a Divide-by-2 & divide-by-5 bit counter.

10. Reset inputs are used in IC 7490, why?
A. For increment of bit by 1
B. For decrement of bit by 1
C. For reset the counter
D. For setting the counter
Answer: C
Clarification: The reset inputs are used to reset the counter to 0000.

11. The set inputs are used in a decade counter, why?
A. To set the counter to 0011
B. To set the counter to 1000
C. To set the counter to 1001
D. To set the counter to 0001
Answer: C
Clarification: The set inputs are used in a decade counter to set the counter to 1001 which is 9 in decimal, as a decade counter counts from 0 to 9.

12. List which pins need to be connected together on a 7493 to make a MOD-12 counter.
A. 12 to 1, 11 to 3, 9 to 2
B. 12 to 1, 11 to 3, 12 to 2
C. 12 to 1, 11 to 3, 8 to 2
D. 12 to 1, 11 to 3, 1 to 2
Answer: C
Clarification: IC-7493 is a MOD-16 counter. So maximum, it can have 16 states. A MOD-12 counter will have 12-states. Thus, it is clear from the diagram shown below: 12 & 1 are clear pins, 11 & 3 are clock pins, 8 & 2 are input for 7493 FF.
digital-circuits-questions-answers-counter-ics-q12

13. Ripple counter IC has _____________
A. 10 pins
B. 11 pins
C. 12 pins
D. 14 pins
Answer: D
Clarification: A ripple counter is of 4-bit and has 4 J-K flip-flops. Ripple counter IC has 14 pins.
digital-circuits-questions-answers-counter-ics-q12

14. Integrated-circuit counter chips are used in numerous applications including ____________
A. Timing operations, counting operations, sequencing, and frequency multiplication
B. Timing operations, counting operations, sequencing, and frequency division
C. Timing operations, decoding operations, sequencing, and frequency multiplication
D. Data generation, counting operations, sequencing, and frequency multiplication
Answer: B
Clarification: There are no integrated circuit counter chips employed for frequency multiplication. In the rest of the options, frequency multiplication is mentioned which is not related to counters in anyway. So, they are not the correct answers. Thus, counters are used for timing operations, counting operations, sequencing and frequency division.

15. What is the difference between 7490 and a 7492?
A. 7490 is a MOD-12, 7492 is a MOD-10
B. 7490 is a MOD-12, 7492 is a MOD-16
C. 7490 is a MOD-16, 7492 is a MOD-10
D. 7490 is a MOD-10, 7492 is a MOD-12
Answer: D
Clarification: From the properties of both ICs, we have 7490 is a MOD-10, 7492 is a MOD-12. Thus, IC-7490 can have maximum 10 states, while IC-7492 can have maximum 12 states.

250+ TOP MCQs on Read Only Memory (ROM) – 2 and Answers

tricky Digital Electronic/Circuits questions and answers on “Read Only Memory(ROM) – 2”.

1. The MOS technology based semiconductor ROMs are classified into _____ categories.
A. 2
B. 3
C. 4
D. 5
Answer: B
Clarification: The MOS technology based semiconductor ROMs are classified into three categories: Mask ROM, PROM,& EPROM. PROM stands for Programmable Read Only Memory in which the ROM can be externally programmed by the user. EPROM stands for Erasable Programmable Read Only Memory, where the ROM and be cleared and re-programmed.

2. MOS ROM is constructed using __________
A. FETs
B. Transistors
C. MOSFETs
D. BJTs
Answer: C
Clarification: MOS ROM is made up of MOSFETs. MOSFETs are Metal Oxide Semiconductor Field Effect Transistors.

3. The full form of EEPROM is __________
A. Erasable Electrically Programmable ROMs
B. Electrically Erasable Programmable ROMs
C. Electrically Erasable Programming ROMs
D. Electrically Erasable Programmed ROMs
Answer: B
Clarification: The full form of EEPROM is Electrically Erasable Programmable ROMs. In EPROM (Erasable Programmable ROMs), the ROM is cleared by exposing it to UV radiation and also it’s a tedious process. Whereas, in EEPROM, the ROM can be cleared electrically and thus is less time consuming and more efficient.

4. Which of the following best describes EPROMs?
A. EPROMs can be programmed only once
B. EPROMs can be erased by UV
C. EPROMs can be erased by shorting all inputs to the ground
D. EPROMs can be erased electrically
Answer: B
Clarification: EPROM (Erasable Programmable ROMs), the ROM is cleared by exposing it to UV radiation and also it’s a tedious process. Whereas, in EEPROM, the ROM can be cleared electrically and thus is less time consuming and more efficient.

5. The Width of a processor’s data path is measured in bits. Which of the following are common data paths?
A. 8 bits
B. 12 bits
C. 16 bits
D. 32 bits
Answer: A
Clarification: In generalised form, the data paths are of 8 bits. The data path, also known as data bus, is the channel through which the processor sends and receives data.

6. What type of memory is not directly addressable by the CPU and requires special software called EMS (expanded memory specification)?
A. Extended
B. Expanded
C. Base
D. Conventional
Answer: B
Clarification: Expanded memory is not directly addressable by the CPU. Expanded memory is the additional memory which is incorporated beyond the parent memory limit of the processor.

7. Which bus is used for input and output in case of microprocessor operation?
A. Address bus
B. System bus
C. Control bus
D. Data bus
Answer: C
Clarification: The input and output are used to control the function of a microprocessor. Hence, the control bus is used to transfer the input and output signal from microprocessor to external peripherals and or from external peripherals to microprocessor.

8. What is the major difference between DRAM and SRAM?
A. Dynamic RAMs are always active; static RAMs must reset between data read/write cycles
B. SRAMs can hold data via a static charge, even with power off
C. The only difference is the terminal from which the data is removed—from the FET Drain or Source
D. DRAMs must be periodically refreshed
Answer: D
Clarification: DRAMs must be periodically refreshed so that it can store the new information. DRAMs are slower compared to SRAMs as the access time for SRAM is less than that of DRAM.

9. Which of the following is not a part of Hard disk?
A. Platter
B. Read/Write
C. Valve
D. Spindle
Answer: C
Clarification: A valve is a device that regulates, directs or controls the flow of a fluid (gases, liquids, fluidized solids, or slurries) by opening, closing, or partially obstructing various passageways. So, it is not a part of hard disk.

10. Which ROM can be erased by an electrical signal?
A. ROM
B. Mask ROM
C. EPROM
D. EEPROM
Answer: D
Clarification: In EPROM (Erasable Programmable ROMs), the ROM is cleared by exposing it to UV radiation and also it’s a tedious process. Whereas, in EEPROM, the ROM can be cleared electrically and thus is less time consuming and more efficient.

11. In the floppy drive, data is written to and read from the disk via a magnetic _____ head mechanism.
A. Cluster
B. Read/Write
C. Cylinder
D. Recordable
Answer: B
Clarification: A floppy disk is a removable disk used for storing data via magnetic facilities. In the floppy drive, data is written to and read from the disk via a magnetic read/write head mechanism.

12. What does the term “random access” mean in terms of memory?
A. Any address can be accessed in systematic order
B. Any address can be accessed in any order
C. Addresses must be accessed in a specific order
D. Any address can be accessed in reverse order
Answer: B
Clarification: “Random access” mean which can be accessed randomly and in other words any address can be accessed in any order.

13. Which type of ROM has to be custom built by the factory?
A. EEPROM
B. Mask ROM
C. EPROM
D. PROM
Answer: B
Clarification: All types of ROM are programmable and can be programmed as per requirement but the mask ROM is always programmed for specific application and it can’t be reprogrammed. PROM stands for Programmable Read Only Memory in which the ROM can be externally programmed by the user. EPROM stands for Erasable Programmable Read Only Memory, where the ROM and be cleared and re-programmed.

14. The computer’s main memory is __________
A. Hard drive and RAM
B. CD-ROM and hard drive
C. RAM and ROM
D. CMOS and hard drive
Answer: C
Clarification: The computer’s main memory is RAM and ROM because all the storage related operation are performed by the data present in RAM/ROM. RAM stands for Random Access Memory where any address can accessed in any order. ROM stands for Read Only Memory wherefrom data can only be read.

15. A major disadvantage of the mask ROM is that ____________
A. It is time consuming to change the stored data when system requirements change
B. It is very expensive to change the stored data when system requirements change
C. It cannot be reprogrammed if stored data needs to be changed
D. It has an extremely short life expectancy and requires frequent replacement
Answer: C
Clarification: A major disadvantage of the mask ROM is that it cannot be reprogrammed if stored data needs to be changed. PROM stands for Programmable Read Only Memory in which the ROM can be externally programmed by the user. EPROM stands for Erasable Programmable Read Only Memory, where the ROM and be cleared and re-programmed.

250+ TOP MCQs on Quine McCluskey or Tabular Method of Minimization of Logic Functions and Answers

Digital Electronic Circuits Questions and Answers for freshers on “Quine-McCluskey or Tabular Method of Minimization of Logic Functions”.

1. The output of an EX-NOR gate is 1. Which input combination is correct?
A. A = 1, B = 0
B. A = 0, B = 1
C. A = 0, B = 0
D. A = 0, B’ = 1
Answer: C
Clarification: The output of EX-NOR gate is given by AB + A’B’. So, for A = 0 and B = 0 the output will be 1.

2. In which of the following gates the output is 1 if and only if at least one input is 1?
A. AND
B. NOR
C. NAND
D. OR
Answer: D
Clarification: In or gate we need at least one bit to be equal to 1 to generate the output as 1 because OR means any of the condition out of two is equal to 1 which means if at least one input is 1 then it shows output as 1.

3. The time required for a gate or inverter to change its state is called __________
A. Rise time
B. Decay time
C. Propagation time
D. Charging time
Answer: C
Clarification: The time required for a gate or inverter to change its state is called propagation time.

4. What is the minimum number of two input NAND gates used to perform the function of two input OR gates?
A. One
B. Two
C. Three
D. Four
Answer: C
Clarification: Y = A + B. This is the equation of OR gate. We require 3 NAND gates to create OR gate. We can also write,
1st, 2nd and 3rd NAND operations as: Y = ((NOT A. AND (NOT B.)’ = A’’ + B’’ = (A+B..

5. Odd parity of word can be conveniently tested by ___________
A. OR gate
B. AND gate
C. NAND gate
D. XOR gate
Answer: D
Clarification: Odd parity of word can be conveniently tested by XOR gate, since, XOR outputs 1 only when the input has odd number of 1’s.

6. The number of full and half adders are required to add 16-bit number is __________
A. 8 half adders, 8 full adders
B. 1 half adders, 15 full adders
C. 16 half adders, 0 full adders
D. 4 half adders, 12 full adders
Answer: B
Clarification: Half adder has two inputs and two outputs whereas Full Adder has 3 inputs and 2 outputs. One half adder can add the least significant bit of the two numbers whereas full adders are required to add the remaining 15 bits as they all involve adding carries.

7. Which of the following will give the sum of full adders as output?
A. Three point major circuit
B. Three bit parity checker
C. Three bit comparator
D. Three bit counter
Answer: D
Clarification: Counters are used for counting purposes in ascending or descending order. Three bit counter will give the sum of full adders as output.

8. Which of the following gate is known as coincidence detector?
A. AND gate
B. OR gate
C. NOR gate
D. NAND gate
Answer: A
Clarification: AND gate is known as coincidence detector due to multiplicity behaviour, as it outputs 1 only when all the inputs are 1.

9. An OR gate can be imagined as ____________
A. Switches connected in series
B. Switches connected in parallel
C. MOS transistor connected in series
D. BJT transistor connected in series
Answer: B
Clarification: OR gate means addition of two inputs, which outputs when any of the input is high. Due to this reason, it is imagined as switches connected in parallel.

10. How many full adders are required to construct an m-bit parallel adder?
A. m/2
B. m
C. m-1
D. m+1
Answer: C
Clarification: We need adder for every bit. So we should need m bit adders. A full adder adds a carry bit to two inputs and produces an output and a carry. But the most significant bits can use a half adder which differs from the full adder as in that it has no carry input, so we need m-1 full adders and 1 half adder in m bit parallel adder.

for Freshers,