250+ TOP MCQs on MOS Digital Integrated Circuits and Answers

Digital Electronics/Circuits Multiple Choice Questions on “MOS Digital Integrated Circuits”.

1. The full form of MOS is ___________
A. Metal oxide semiconductor
B. Metal oxygen semiconductor
C. Metallic oxide semiconductor
D. Metallic oxygen semiconductor
Answer: A
Clarification: The full form of MOS is “Metal Oxide Semiconductor”. It is a type of transistor having 3 layers: a metal conductor, an insulating silicon layer and a semiconductor silicon layer.

2. What are the types of MOSFET devices available?
A. P-type enhancement type MOSFET
B. N-type enhancement type MOSFET
C. Depletion type MOSFET
D. All of the mentioned
Answer: D
Clarification: MOSFET are of two types: enhancement and depletion type. Further, these are classified into n-type and p-type device. The depletion type is switched on without the application of gate bias voltage and the enhancement type is switched on with the application of gate voltage.

3. Which insulating layer used in the fabrication of MOSFET?
A. Aluminium oxide
B. Silicon Nitride
C. Silicon dioxide
D. Aluminium Nitrate
Answer: C
Clarification: Silicon dioxide is used as an insulating layer in the fabrication of MOSFET. It gives an extremely high input resistance in the order of 1010 to 1015 Ω for MOSFET.

4. Which of the following plays an important role in improving the device performance of MOSFET?
A. Dielectric constant
B. Threshold voltage
C. Power supply voltage
D. Gate to drain voltage
Answer: B
Clarification: In MOSFET, the threshold voltage is typically 3 to 6V. This large voltage is not compatible with the supply of 5V which is used in digital ICs. So, for the improvement of the device’s performance the magnitude of threshold voltage should be reduced.

5. A technique used to reduce the magnitude of threshold voltage of MOSFET is the ___________
A. Use of complementary MOSFET
B. Use of Silicon nitride
C. Using thin film technology
D. Increasing potential of the channel
Answer: B
Clarification: Silicon nitride is sandwiched between two SiO2 layer and provide necessary barrier. The dielectric constant of Si3N4 is 7.5, whereas that of SiO2 is 4. This increase in overall dielectric constant reduces threshold voltage.

6. What is used to higher the speed of operation in MOSFET fabrication?
A. Ceramic gate
B. Silicon dioxide
C. Silicon nitride
D. Poly silicon gate
Answer: D
Clarification: In conventional metal gate small overlap capacitance is present, which lowers the speed of operation. With the presence of self aligning property of the poly silicon gate it eliminates this capacitance. Using a process called ion-implantation, polysilicon, the drain and the source get doped. However, the thin oxide under silicon gate acting as a mask for the process and thus develops the gate aligning property.

7. Find the sequence of steps involved in fabrication of poly silicon gate MOSFET?

Step 1: Entire wafer surface of a Si3N4 is coated and is etched away with the help of mask to include 
source, gate and drain.
Step 2: The contact areas are defined using photolithographic process.
Step 3: Selective etching of Si3N4 and growth of thin oxide.
Step 4: The deposition of poly silicon gate.
Step 5: The growth of thick oxide is called field oxide and P implantation.
Step 6: The metallization and interconnection between substrate and source.

A. 1->5->3->4->2->6
B. 1->3->4->2->5->6
C. 1->5->4->3->2->6
D. 1->4->2->5->3->6
Answer: A
Clarification: These steps are the sequence of steps involved in fabrication of poly silicon gate MOSFET. With the help of poly silicon gate doping, it highers the speed of operation of the MOSFET.

8. Why MOSFET is preferred over BJT in IC components?
A. MOSFET has low packing density
B. MOSFET has medium packing density
C. MOSFET has high packing density
D. MOSFET has no packing density
Answer: A
Clarification: MOSFET is preferred over BJT because of its low packaging density. Thus, more number of MOSFET memory cells can be accommodated in a particular area as compared to BJT.

9. Critical defects per unit chip area are ________ for a MOS transistor.
A. High
B. Low
C. Neutral
D. Very High
Answer: B
Clarification: Critical defects per unit chip area is low for a MOS transistor because it involves fewer steps in the fabrication of a MOS transistor. Also, MOSFET has low packaging density.

10. MOS is being used in ___________
A. LSI
B. VLSI
C. MSI
D. Both LSI and VLSI
Answer: D
Clarification: Since more transistor and circuitry functions can be achieved on a single chip with MOS technology that is why MOS is being used in LSI and VLSI. LSI stands for Large Scale Integration and VLSI stands for Very Large Scale Integration.

250+ TOP MCQs on Multiplexers (Data Selectors) – 1 and Answers

Digital Electronics/Circuits Multiple Choice Questions on “Multiplexers (Data Selectors) – 1”.

1. What is a multiplexer?
A. It is a type of decoder which decodes several inputs and gives one output
B. A multiplexer is a device which converts many signals into one
C. It takes one input and results into many output
D. It is a type of encoder which decodes several inputs and gives one output
Answer: B
Clarification: A multiplexer (or MUX) is a device that selects one of several analog or digital input signals and forwards the selected input into a single line, depending on the active select lines.

2. Which combinational circuit is renowned for selecting a single input from multiple inputs & directing the binary information to output line?
A. Data Selector
B. Data distributor
C. Both data selector and data distributor
D. DeMultiplexer
Answer: A
Clarification: Data Selector is another name of Multiplexer. A multiplexer (or MUX) is a device that selects one of several analog or digital input signals and forwards the selected input into a single line, depending on the active select lines.

3. It is possible for an enable or strobe input to undergo an expansion of two or more MUX ICs to the digital multiplexer with the proficiency of large number of ___________
A. Inputs
B. Outputs
C. Selection lines
D. Enable lines
Answer: A
Clarification: It is possible for an enable or strobe input to undergo an expansion of two or more MUX ICs to the digital multiplexer with the proficiency of large number of inputs.

4. Which is the major functioning responsibility of the multiplexing combinational circuit?
A. Decoding the binary information
B. Generation of all minterms in an output function with OR-gate
C. Generation of selected path between multiple sources and a single destination
D. Encoding of binary information
Answer: C
Clarification: The major functioning responsibility of the multiplexing combinational circuit is generation of selected path between multiple sources and a single destination because it makes the circuit too flexible. A multiplexer (or MUX) is a device that selects one of several analog or digital input signals and forwards the selected input into a single line, depending on the active select lines.

5. What is the function of an enable input on a multiplexer chip?
A. To apply Vcc
B. To connect ground
C. To active the entire chip
D. To active one half of the chip
Answer: C
Clarification: Enable input is used to active the chip, when enable is high the chip works (ACTIVE), when enable is low the chip does not work (MEMORY). However, Enable can be Active-High or Active-Low, indicating it is active either when it is connected to VCC or GND respectively.

6. One multiplexer can take the place of ___________
A. Several SSI logic gates
B. Combinational logic circuits
C. Several Ex-NOR gates
D. Several SSI logic gates or combinational logic circuits
Answer: D
Clarification: A multiplexer (or MUX) is a device that selects one of several analog or digital input signals and forwards the selected input into a single line, depending on the active select lines. Since many operational behaviour can be performed by using a multiplexer. Whereas, a combinational circuit is a combination of many logic gates which makes the circuit more complex.

7. A digital multiplexer is a combinational circuit that selects ___________
A. One digital information from several sources and transmits the selected one
B. Many digital information and convert them into one
C. Many decimal inputs and transmits the selected information
D. Many decimal outputs and accepts the selected information
Answer: A
Clarification: A digital multiplexer is a combinational circuit that selects one digital information from several sources and transmits the selected information on a single output line depending on the status of the select lines. That is why it is also known as a data selector.

8. In a multiplexer, the selection of a particular input line is controlled by ___________
A. Data controller
B. Selected lines
C. Logic gates
D. Both data controller and selected lines
Answer: B
Clarification: The selection of a particular input line is controlled by a set of selected lines in a multiplexer, which helps to select a particular input from several sources.

9. If the number of n selected input lines is equal to 2^m then it requires _____ select lines.
A. 2
B. m
C. n
D. 2n
Answer: B
Clarification: If the number of n selected input lines is equal to 2^m then it requires m select lines to select one of m select lines.

10. How many select lines would be required for an 8-line-to-1-line multiplexer?
A. 2
B. 4
C. 8
D. 3
Answer: D
Clarification: 2n input lines, n control lines and 1 output line available for MUX. Here, 8 input lines mean 23 inputs. So, 3 control lines are possible. Depending on the status of the select lines, the input is selected and fed to the output.

11. A basic multiplexer principle can be demonstrated through the use of a ___________
A. Single-pole relay
B. DPDT switch
C. Rotary switch
D. Linear stepper
Answer: C
Clarification: A basic multiplexer principle can be demonstrated through the use of a rotary switch. Since its behaviour is similar to the multiplexer. There are around 10 digits out of which one is selected one at a time and fed to the output.

12. How many NOT gates are required for the construction of a 4-to-1 multiplexer?
A. 3
B. 4
C. 2
D. 5
Answer: C
Clarification: There are two NOT gates required for the construction of 4-to-1 multiplexer. x0, x1, x2 and x3 are the inputs and C1 and C0 are the select lines and M is the output.
The diagram of a 4-to-1 multiplexer is shown below: digital-circuits-questions-answers-multiplexers-data-selectors-1-q13

13. In the given 4-to-1 multiplexer, if c1 = 0 and c0 = 1 then the output M is ___________
digital-circuits-questions-answers-multiplexers-data-selectors-1-q13
A. X0
B. X1
C. X2
D. X3
Answer: B
Clarification: The output will be X1, because c1 = 0 and c0 = 1 results into 1 which further results as X1. And rest of the AND gates gives output as 0.

14. The enable input is also known as ___________
A. Select input
B. Decoded input
C. Strobe
D. Sink
Answer: C
Clarification: The enable input is also known as strobe which is used to cascade two or more multiplexer ICs to construct a multiplexer with a larger number of inputs. Enable input activates the multiplexer to operate.

250+ TOP MCQs on Master-Slave Flip-Flops and Answers

Digital Electronics/Circuits Multiple Choice Questions on “Master-Slave Flip-Flops”.

1. The asynchronous input can be used to set the flip-flop to the ____________
A. 1 state
B. 0 state
C. either 1 or 0 state
D. forbidden State
Answer: C
Clarification: The asynchronous input can be used to set the flip-flop to the 1 state or clear the flip-flop to the 0 state at any time, regardless of the condition at the other inputs.

2. Input clock of RS flip-flop is given to ____________
A. Input
B. Pulser
C. Output
D. Master slave flip-flop
Answer: B
Clarification: Pulser behaves like an arithmetic operator, to perform the operation or determination of corresponding states.

3. D flip-flop is a circuit having ____________
A. 2 NAND gates
B. 3 NAND gates
C. 4 NAND gates
D. 5 NAND gates
Answer: C
Clarification: D flip-flop is a circuit having 4 NAND gates. Two of them are connected with each other.

4. In JK flip flop same input, i.e. at a particular time or during a clock pulse, the output will oscillate back and forth between 0 and 1. At the end of the clock pulse the value of output Q is uncertain. The situation is referred to as?
A. Conversion condition
B. Race around condition
C. Lock out state
D. Forbidden State
Answer: B
Clarification: A race around condition is a flaw in an electronic system or process whereby the output and result of the process is unexpectedly dependent on the sequence or timing of other events.

5. Master slave flip flop is also referred to as?
A. Level triggered flip flop
B. Pulse triggered flip flop
C. Edge triggered flip flop
D. Edge-Level triggered flip flop
Answer: B
Clarification: The term pulse triggered means the data is entered on the rising edge of the clock pulse, but the output does not reflect the change until the falling edge of the clock pulse.

6. In a positive edge triggered JK flip flop, a low J and low K produces?
A. High state
B. Low state
C. Toggle state
D. No Change State
Answer: D
Clarification: In JK Flip Flop if J = K = 0 then it holds its current state. There will be no change.

7. If one wants to design a binary counter, the preferred type of flip-flop is ____________
A. D type
B. S-R type
C. Latch
D. J-K type
Answer: D
Clarification: If one wants to design a binary counter, the preferred type of flip-flop is J-K type because it has capability to recover from toggle condition. SR flip-flop is not suitable as it produces the “Invalid State”.

8. S-R type flip-flop can be converted into D type flip-flop if S is connected to R through ____________
A. OR Gate
B. AND Gate
C. Inverter
D. Full Adder
Answer: C
Clarification: S-R type flip-flop can be converted into D type flip-flop if S is connected to R through an Inverter gate.

9. Which of the following flip-flops is free from the race around the problem?
A. T flip-flop
B. SR flip-flop
C. Master-Slave Flip-flop
D. D flip-flop
Answer: A
Clarification: T flip-flop is free from the race around condition because its output depends only on the input; hence there is no any problem creates as like toggle.

10. Which of the following is the Universal Flip-flop?
A. S-R flip-flop
B. J-K flip-flop
C. Master slave flip-flop
D. D Flip-flop
Answer: B
Clarification: There are lots of flip-flops can be prepared by using J-K flip-flop. So, the name is a universal flip-flop. Also, the JK flip-flop resolves the Forbidden State.

11. How many types of triggering take place in a flip flops?
A. 3
B. 2
C. 4
D. 5
Answer: A
Clarification: There are three types of triggering in a flip-flop, viz., level triggering, edge triggering and pulse triggering.

12. Flip-flops are ____________
A. Stable devices
B. Astable devices
C. Bistable devices
D. Monostable devices
Answer: C
Clarification: Flip-flops are synchronous bistable devices known as bistable multivibrators as they have 2 stable states.

13. The term synchronous means ____________
A. The output changes state only when any of the input is triggered
B. The output changes state only when the clock input is triggered
C. The output changes state only when the input is reversed
D. The output changes state only when the input follows it
Answer: B
Clarification: The term synchronous means the output changes state only when the clock input is triggered. That is, changes in the output occur in synchronization with the clock.

14. The S-R, J-K and D inputs are called ____________
A. Asynchronous inputs
B. Synchronous inputs
C. Bidirectional inputs
D. Unidirectional inputs
Answer: B
Clarification: The S-R, J-K and D inputs are called synchronous inputs because data on these inputs are transferred to the flip-flop’s output only on the triggering edge or level triggering of the clock pulse. Moreover, flip-flops have a clock input whereas latches don’t. Hence, known as synchronous inputs.

15. The circuit that generates a spike in response to a momentary change of input signal is called ____________
A. R-C differentiator circuit
B. L-R differentiator circuit
C. R-C integrator circuit
D. L-R integrator circuit
Answer: A
Clarification: The circuit that generates a spike in response to a momentary change of input signal is called R-C differentiator circuit.

250+ TOP MCQs on Introduction of Memory Devices – 3 and Answers

Digital Electronic/Circuits Puzzles on “Introduction of Memory Devices-3”.

1. Memories are classified into _____ categories.
A. 3
B. 4
C. 5
D. 6
Answer: C
Clarification: Memory is typically classified of 2 types: Primary and Secondary. These are further classified into 5 types of memories and these are Secondary, RAM, Dynamic/Static, Volatile/Non-volatile, Magnetic/Semiconductor Memory.

2. Secondary memory is also known as ___________
A. Registers
B. Main Memory
C. RAM
D. Both registers and main memory
Answer: D
Clarification: Secondary memory is also known as Registers/Main Memory. In secondary memory, data is usually stored for a long-term.

3. In a computer, registers are present __________
A. Within control unit
B. Within RAM
C. Within ROM
D. Within CPU
Answer: D
Clarification: In a computer, registers are present within the CPU to store data temporarily during arithmetic and logical operations and during the functioning of the ALU.

4. Which of the following has the lowest access time?
A. RAM
B. ROM
C. Registers
D. Flag
Answer: C
Clarification: Registers has the lowest access time, as they are available inside the CPU. Registers are present within the CPU to store data temporarily during arithmetic and logical operations and during the functioning of the ALU.

5. Main memories of a computer, usually made up of __________
A. Registers
B. Semiconductors
C. Counters
D. PLDs
Answer: B
Clarification: Main memories of a computer, usually made up of semiconductors which are available external to the CPU to store program and data during execution of a program. Registers are present within the CPU to store data temporarily during arithmetic and logical operations and during the functioning of the ALU.

6. As the storage capacity of the main memory is inadequate, which memory is used to enhance it?
A. Secondary Memory
B. Auxiliary Memory
C. Static Memory
D. Both Secondary Memory and Auxiliary Memory
Answer: D
Clarification: As the storage capacity of the main memory is inadequate, Secondary memory is used to enhance it and it is also known as auxiliary memory. Secondary memory is also known as Registers/Main Memory. In secondary memory, data is usually stored for a long-term.

7. Which memories are if magnetic memory type?
A. Main Memory
B. Secondary Memory
C. Static Memory
D. Volatile Memory
Answer: B
Clarification: Usually, secondary memories are of magnetic memory type that are used to store large type quantities of data. In secondary memory, data is usually stored for a long-term.

8. Which of the following comes under secondary memory/ies?
A. Floppy disk
B. Magnetic drum
C. Hard disk
D. All of the Mentioned
Answer: D
Clarification: All of the mentioned equipments are of external storage which is known as secondary memories. In secondary memory, data is usually stored for a long-term.

9. Based on method of access, memory devices are classified into ____________ categories.
A. 2
B. 3
C. 4
D. 5
Answer: A
Clarification: Based on the method of access, memory devices are classified into two categories and these are sequential access memory and RAM. A sequential access memory is one in which a particular memory location is accessed sequentially.

10. A sequential access memory is one in which __________
A. A particular memory location is accessed rapidly
B. A particular memory location is accessed sequentially
C. A particular memory location is accessed serially
D. A particular memory location is accessed parallely
Answer: B
Clarification: A sequential access memory is one in which A particular memory location is accessed sequentially (i.e. the ith memory location is accessed only after sequencing through previous (i-1) memory locations).

11. An example of sequential access memory is __________
A. Floppy disk
B. Hard disk
C. Magnetic tape memory
D. RAM
Answer: C
Clarification: A sequential access memory is one in which a particular memory location is accessed sequentially. In magnetic tape memory, data is accessed sequentially.

12. A Random Access Memory is one in which __________
A. Any location can be accessed sequentially
B. Any location can be accessed randomly
C. Any location can be accessed serially
D. Any location can be accessed parallely
Answer: B
Clarification: A Random Access Memory is one in which any location can be accessed randomly.

13. An example of RAM is __________
A. Floppy disk
B. Hard disk
C. Magnetic tape memory
D. Semiconductor RAM
Answer: D
Clarification: A Random Access Memory is one in which any location can be accessed randomly. A semiconductor RAM is too much fast and can occupy any space in the memory location.

14. A static memory is one in which __________
A. Content changes with time
B. Content doesn’t changes with time
C. Memory is static always
D. Memory is dynamic always
Answer: D
Clarification: A static memory is one in which content doesn’t changes with time (i.e. stable). Dynamic memory is one in which content changes with time (i.e. unstable).

15. A dynamic memory is one in which __________
A. Content changes with time
B. Content doesn’t changes with time
C. Memory is static always
D. Memory is dynamic always
Answer: D
Clarification: A static memory is one in which content doesn’t change with time (i.e. stable). Dynamic memory is one in which content changes with time (i.e. unstable).

puzzles on all areas of Digital Electronic Circuits,

250+ TOP MCQs on Binary Coded Decimal(BCD. and Answers

Digital Electronics/Circuits Multiple Choice Questions on “Binary Coded Decimal(BCD.”.

1. Binary coded decimal is a combination of __________
A. Two binary digits
B. Three binary digits
C. Four binary digits
D. Five binary digits
Answer: C
Clarification: Binary coded decimal is a combination of 4 binary digits. For example-8421.

2. The decimal number 10 is represented in its BCD form as __________
A. 10100000
B. 01010111
C. 00010000
D. 00101011
Answer: C
Clarification: The decimal number 10 is represented in its BCD form as 0001 0000, in accordance to 8421 for each of the two digits.

3. Add the two BCD numbers: 1001 + 0100 = ?
A. 10101111
B. 01010000
C. 00010011
D. 00101011
Answer: C
Clarification: Firstly, Add the 1001 and 0100. We get 1101 as output but it’s not in BCD form. So, we add 0110 (i.e. 6) with 1101. As a result we get 10011 and it’s BCD form is 0001 0011.

4. Carry out BCD subtraction for (68) – (61) using 10’s complement method.
A. 00000111
B. 01110000
C. 100000111
D. 011111000
Answer: A
Clarification: First the two numbers are converted into their respective BCD form using 8421 sequence. Then binary subtraction is carried out.

5. Code is a symbolic representation of __________ information.
A. Continuous
B. Discrete
C. Analog
D. Both continuous and discrete
Answer: B
Clarification: Code is a symbolic representation of discrete information, which may be present in the form of numbers, letters or physical quantities. Mostly, it is represented using a particular number system like decimal or binary and such like.

6. When numbers, letters or words are represented by a special group of symbols, this process is called __________
A. Decoding
B. Encoding
C. Digitizing
D. Inverting
Answer: B
Clarification: When numbers, letters or words are represented by a special group of symbols, this process is called encoding. Encoding in the sense of fetching the codes or words in a computer. It is done to secure the transmission of information.

7. A three digit decimal number requires ________ for representation in the conventional BCD format.
A. 3 bits
B. 6 bits
C. 12 bits
D. 24 bits
Answer: C
Clarification: The number of bits needed to represent a given decimal number is always greater than the number of bits required for a straight binary encoding of the same. Hence, a three digit decimal number requires 12 bits for representation in BCD format.

8. How many bits would be required to encode decimal numbers 0 to 9999 in straight binary codes?
A. 12
B. 14
C. 16
D. 18
Answer: B
Clarification: Total number of decimals to be represented = 10000 = 104 = 2n (where n is the number of bits requireD. = 213.29. Therefore, the number of bits required for straight binary encoding = 14.

9. The excess-3 code for 597 is given by __________
A. 100011001010
B. 100010100111
C. 010110010111
D. 010110101101
Answer: A
Clarification: The addition of ‘3’ to each digit yields the three new digits ‘8’, ’12’ and ’10’. Hence, the corresponding four-bit binary equivalents are 100011001010, in accordance to 8421 format.

10. The decimal equivalent of the excess-3 number 110010100011.01110101 is _____________
A. 970.42
B. 1253.75
C. 861.75
D. 1132.87
Answer: A
Clarification: The conversion of binary numbers into digits ‘1100’, ‘1010’, ‘0011’, ‘0111’ and ‘0101’ gives ’12’, ‘5’, ‘3’, ‘7’ and ‘5’ respectively. Hence, the decimal number is 970.42.

250+ TOP MCQs on Characteristics of CMOS and Answers

Digital Electronics/Circuits Multiple Choice Questions on “Characteristics of CMOS”.

1. The full form of CMOS is ____________
A. Capacitive metal oxide semiconductor
B. Capacitive metallic oxide semiconductor
C. Complementary metal oxide semiconductor
D. Complemented metal oxide semiconductor
Answer: C
Clarification: The full form of CMOS is complementary metal oxide semiconductor. In this type of device, both n-type and p-type transistors are used in a complementary way.

2. The full form of COS-MOS is ____________
A. Complementary symmetry metal oxide semiconductor
B. Complementary systematic metal oxide semiconductor
C. Capacitive symmetry metal oxide semiconductor
D. Complemented systematic metal oxide semiconductor
Answer: A
Clarification: The full form of COS-MOS is complementary systematic metal oxide semiconductor. In this type of device, both n-type and p-type transistors are used in a complementary way. Usually, the transistors used are MOSFETs.

3. CMOS is also sometimes referred to as ____________
A. Capacitive metal oxide semiconductor
B. Capacitive symmetry metal oxide semiconductor
C. Complementary symmetry metal oxide semiconductor
D. Complemented symmetry metal oxide semiconductor
Answer: C
Clarification: CMOS is also sometimes referred to as complementary systematic metal oxide–semiconductor (COS-MOS). In this type of device, both n-type and p-type transistors are used in a complementary way. Usually, the transistors used are MOSFETs.

4. CMOS technology is used in ____________
A. Inverter
B. Microprocessor
C. Digital logic
D. Both microprocessor and digital logic
Answer: D
Clarification: CMOS technology is used in Microprocessor, Microcontroller, static RAM and other digital logic circuits. CMOS technology is also used for several analog circuits such as image sensors (CMOS sensor), data converters and highly integrated transceivers for many types of communication.

5. Two important characteristics of CMOS devices are ____________
A. High noise immunity
B. Low static power consumption
C. High resistivity
D. Both high noise immunity and low static power consumption
Answer: D
Clarification: Two important characteristics of CMOS devices are high noise immunity and low static power consumption. Since one transistor of the pair is always off and the series combination draws significant power only momentarily during switching between on and off states. Also, the performance of CMOS is not altered with the presence of noise and thus it has high noise immunity.

6. CMOS behaves as a/an ____________
A. Adder
B. Subtractor
C. Inverter
D. Comparator
Answer: C
Clarification: Since, the outputs of the PMOS and NMOS transistors are complementary such that when the input is low, the output is high and when the input is high, the output is low. Because of this behaviour of input and output, the CMOS circuit’s output is the inverse of the input. Whereas, adders and subtractors are combinational circuits.

7. An important characteristic of a CMOS circuit is the ____________
A. Noise immunity
B. Duality
C. Symmetricity
D. Noise Margin
Answer: B
Clarification: An important characteristic of a CMOS circuit is the duality that exists between its PMOS transistors and NMOS transistors. Due to the presence of two different types of transistors, the device has a complementary function.

8. CMOS logic dissipates _______ power than NMOS logic circuits.
A. More
B. Less
C. Equal
D. Very High
Answer: B
Clarification: CMOS logic dissipates less power than NMOS logic circuits because CMOS dissipates power only when switching (“dynamic power”). Thus, CMOS has less power consumption and is more efficient.

9. Semiconductors are made of ____________
A. Ge and Si
B. Si and Pb
C. Ge and Pb
D. Pb and Au
Answer: A
Clarification: Semiconductors are made of Silicon (Si) and Germanium (Ge). Semiconductors are devices having conductivity between conductors and insulators.

10. Which chip were the first RTC and CMOS RAM chip to be used in early IBM computers, capable of storing a total of 64 bytes?
A. The Samsung 146818
B. The Samsung 146819
C. The Motorola 146818
D. The Motorola 146819
Answer: C
Clarification: The Motorola 146818 was the first RTC and CMOS RAM chip to be used in early IBM computers; capable of storing a total of 64 bytes.