This set of VHDL Questions on “Need of HDLs”.
1. In what aspect, HDLs differ from other computer programming languages?
a) No aspect; both are same
b) HDLs describe hardware rather than executing a program on a computer
c) HDLs describe software and not hardware
d) Other computer programming languages have more complexity
Answer: b
Clarification: HDLs (Hardware Description Languages) are used to describe hardware for any electronic circuit or system; whereas other computer programming languages execute a program on the computer itself.
2. Which of the following HDLs are IEEE standards?
a) VHDL and Verilog
b) C and C++
c) Altera and Xilinx
d) Quartus II and MaxPlus II
Answer: a
Clarification: VHDL and Verilog are the only two HDLs endorsed by IEEE. C andC++ are not HDLs. Altera and Xilinx are devices on which these HDLs can be used. Quartus II and MaxPlus II are the platforms for simulation of hardware described by HDLs.
3. Why we needed HDLs while having many traditional Programming languages?
a) Traditional programming languages are complex
b) HDLs are complementary to traditional programming languages to complete the design process
c) Some characteristics of digital hardware couldn’t be captured by traditional languages
d) HDLs offer more complexity than traditional programming languages.
Answer: c
Clarification: Digital systems are very complex and this complexity is increasing day by day. Some characteristics like propagation delay, concurrent processing and interconnection of parts can’t be captured with traditional languages.
4. An HDL can’t describe Hardware at Gate level as well as switch level?
a) True
b) False
Answer: b
Clarification: An HDL supports the hierarchical design process. It can describe the circuit or hardware at every possible level, whether it is gate level or switch level or RTL level.
5. Why do we need concurrent processing for describing digital systems in HDLs?
a) Faster processing than conventional programming languages
b) Concurrent processing is easier than sequential processing
c) It allows taking timing constraints into consideration
d) Complexity of digital systems needs concurrent processing
Answer: d
Clarification: Due to the complexity of digital circuits, we need to process all the instructions at the same time. For example, current can flow in the two branches at the same time which can affect the output of the system, if sequentially processed.
6. An ASIC can be correctly designed by using programming languages like C or Assembly.
a) True
b) False
Answer: b
Clarification: By using HDL, we specify what we need. We can optimize the circuit by using HDLs. ASIC(Application Specific IC) is a very complex which may consist of millions of transistors. So, we need concurrent execution first of all. Apart from that, we need timing information and other complex features of the digital system too.
7. VHDL is based on which of the following programming languages?
a) ADA programming language
b) C
c) Assembly
d) PHP
Answer: a
Clarification: The syntax and whole structure of VHDL code is based upon ADA programming language whereas Verilog HDL finds its origin from C language.
8. What is the advantage of using VHDL instead of any other HDL?
a) Week typing
b) Based on ADA
c) Portability
d) Easy to code
Answer: c
Clarification: A circuit specified in VHDL can be implemented in different chips and is compatible with CAD tools provided by all companies. Therefore, without any modification, we can use VHDL code anywhere. This is the biggest advantage because digital circuit technology changes rapidly.
9. Which of the following is a characteristic of VHDL?
a) Case sensitive
b) Use of simple data types
c) Based on C programming language
d) Strongly typed language
Answer: d
Clarification: VHDL is a strongly typed language i.e. we have to write a long code to define operations.
10. Which of the following is a characteristic of Verilog HDL?
a) Strongly typed language
b) Case sensitive
c) Better library
d) Not portable
Answer: b
Clarification: Verilog HDL is a case sensitive language which means ‘a’ and ‘A’ means different if you are coding in Verilog.
all exam questions on VHDL, .