Computer Organization and Architecture Multiple Choice Questions on “Direct Memory Access”.
1. The DMA differs from the interrupt mode by __________
a) The involvement of the processor for the operation
b) The method of accessing the I/O devices
c) The amount of data transfer possible
d) None of the mentioned
Answer: d
Clarification: DMA is an approach of performing data transfers in bulk between memory and the external device without the intervention of the processor.
2. The DMA transfers are performed by a control circuit called as __________
a) Device interface
b) DMA controller
c) Data controller
d) Overlooker
Answer: b
Clarification: The Controller performs the functions that would normally be carried out by the processor.
3. In DMA transfers, the required signals and addresses are given by the __________
a) Processor
b) Device drivers
c) DMA controllers
d) The program itself
Answer: c
Clarification: The DMA controller acts as a processor for DMA transfers and overlooks the entire process.
4. After the completion of the DMA transfer, the processor is notified by __________
a) Acknowledge signal
b) Interrupt signal
c) WMFC signal
d) None of the mentioned
Answer: b
Clarification: The controller raises an interrupt signal to notify the processor that the transfer was complete.
5. The DMA controller has _______ registers.
a) 4
b) 2
c) 3
d) 1
Answer: c
Clarification: The Controller uses the registers to store the starting address, word count and the status of the operation.
6. When the R/W bit of the status register of the DMA controller is set to 1.
a) Read operation is performed
b) Write operation is performed
c) Read & Write operation is performed
d) None of the mentioned
Answer: a
Clarification: None.
7. The controller is connected to the ____
a) Processor BUS
b) System BUS
c) External BUS
d) None of the mentioned
Answer: b
Clarification: The controller is directly connected to the system BUS to provide faster transfer of data.
8. Can a single DMA controller perform operations on two different disks simultaneously?
a) True
b) False
Answer: a
Clarification: The DMA controller can perform operations on two different disks if the appropriate details are known.
9. The technique whereby the DMA controller steals the access cycles of the processor to operate is called __________
a) Fast conning
b) Memory Con
c) Cycle stealing
d) Memory stealing
Answer: c
Clarification: The controller takes over the processor’s access cycles and performs memory operations.
10. The technique where the controller is given complete access to main memory is __________
a) Cycle stealing
b) Memory stealing
c) Memory Con
d) Burst mode
Answer: d
Clarification: The controller is given full control of the memory access cycles and can transfer blocks at a faster rate.
11. The controller uses _____ to help with the transfers when handling network interfaces.
a) Input Buffer storage
b) Signal enhancers
c) Bridge circuits
d) All of the mentioned
Answer: a
Clarification: The controller stores the data to transfer in the buffer and then transfers it.
12. To overcome the conflict over the possession of the BUS we use ______
a) Optimizers
b) BUS arbitrators
c) Multiple BUS structure
d) None of the mentioned
Answer: b
Clarification: The BUS arbitrator is used to overcome the contention over the BUS possession.
13. The registers of the controller are ______
a) 64 bits
b) 24 bits
c) 32 bits
d) 16 bits
Answer: c
Clarification: None.
14. When the process requests for a DMA transfer?
a) Then the process is temporarily suspended
b) The process continues execution
c) Another process gets executed
d) process is temporarily suspended & Another process gets executed
Answer: d
Clarification: The process requesting the transfer is paused and the operation is performed, meanwhile another process is run on the processor.
15. The DMA transfer is initiated by _____
a) Processor
b) The process being executed
c) I/O devices
d) OS
Answer: c
Clarification: The transfer can only be initiated by an instruction of a program being executed.