VLSI Multiple Choice Questions on “Design Processes”.
1. Microprocessor has __________ major architectural blocks.
A. two
B. three
C. four
D. five
Answer: C
Clarification: MIcropocessor has four major architectural blocks – ALU, control unit, I/O unit and memory.
2. High level of system integration __________ interconnections.
A. reduces
B. increases
C. does not affect
D. doubles
Answer: A
Clarification: High level of system integration usually greatly reduces interconnections which is a weak spot in any system.
3. Some important features of system are
A. lower weight
B. lower volume
C. lower power dissipation
D. all of the mentioned
Answer: D
Clarification: Lower power dissipation, lower weight, lower volume are some of the important features of system.
4. Performance is better if power speed product is
A. low
B. high
C. very low
D. very high
Answer: B
Clarification: Performance is better if power speed product is high. Performance is analysed using this speed power product.
5. VLSI design is done in _________ approach.
A. top-down
B. bottom-up
C. random
D. semi random
Answer: A
Clarification: VLSI design is done in top-down manner with adequate computer aided tools to do the job. Partitioning, generating or building and verification is done.
6. Components operating in high frequency should be
A. far apart
B. closely spaced
C. randomly spaced
D. can be placed in straight manner
Answer: B
Clarification: Components operating in high frequency should be at physically proximate, since one may pay severe penalties for long, high bandwidth interconnects.
7. Approach used for design process are
A. circuit symbols
B. logic symbols
C. stick diagrams
D. all of the mentioned
Answer: D
Clarification: Several approaches used for design process are conventional circuit symbols, logic symbols, stick diagrams, mask layouts, architectural block diagrams and floor plans.
8. Which approach is used to show the relative disposition of subunits?
A. architectural block diagram
B. stick diagram
C. layout diagram
D. floor plan
Answer: D
Clarification: Floor plan is used to show the planned relative disposition of the subunits on the chip and thus on mask layouts.
9. When polysilicon crosses a diffusion __________ will be formed.
A. via
B. transistor
C. switch
D. short circuit
Answer: B
Clarification: When and where ever the polysilicon crosses the diffusion, transistor will be formed.
10. Two metal layers can be joined by using
A. contact cut
B. wire
C. via
D. glass
Answer: C
Clarification: The first metal layer can be joined with the second one using via. Via is an electrical connection between layers in a physical electronic circuit.
11. The bottom subfunction is called as
A. lower function
B. low cell
C. leaf cell
D. bottom cell
Answer: C
Clarification: The complex function is divided into many subfunctions and the bottom level of these sub functions are called as leaf cells.
12. Which must be given the highest priority in design process?
A. architecture
B. communication
C. colour
D. thickness
Answer: B
Clarification: Communication must be given highest priority in the design process as interconnections pose the most acute problems in the design of large systems.