Computer Organization and Architecture Multiple Choice Questions on “Intel IA-32 Pentium Architecture-1”.
1. The address space of the IA-32 is __________
a) 216
b) 232
c) 264
d) 28
Answer: b
Clarification: The number of addressable locations in the memory is called as address space.
2. The addressing method used in IA-32 is ____________
a) Little Endian
b) Big Endian
c) X-Little Endian
d) Both Little and Big Endian
Answer: a
Clarification: The method of addressing the data in the system.
3. The floating point numbers are stored in general purpose register in IA-32.
a) True
b) False
Answer: b
Clarification: The floating registers are not stored in general purpose registers as they have a real part and a decimal part.
4. The Floating point registers of IA-32 can operate on operands up to ___________
a) 128 bit
b) 256 bit
c) 80 bit
d) 64 bit
Answer: d
Clarification: The size of the floating numbers that can be stored in the floating register.
5. The size of the floating registers can be extended upto _________
a) 128 bit
b) 256 bit
c) 80 bit
d) 64 bit
Answer: c
Clarification: None.
6. The IA-32 architecture associates different parts of memory called __________ with different usages.
a) Frames
b) Pages
c) Tables
d) Segments
Answer: d
Clarification: The memory is divided into parts called as segments.
7. The PC is incorporated with the help of general purpose registers.
a) True
b) False
Answer: b
Clarification: Registers are not used to incorporate PC as in other architectures, but a separate space is allocated to it.
8. IOPL stands for ________
a) Input/Output Privilege level
b) Input Output Process Link
c) Internal Output Process Link
d) Internal Offset Privilege Level
Answer: a
Clarification: This indicates the security between the transfers between the I/O devices and memory.
9. In IA-32 architecture along with the general flags, the other conditional flags provided are ___________
a) IOPL
b) IF
c) TF
d) All of the mentioned
Answer: d
Clarification: These flags are basically used to check the system for exceptions.
10. The register used to serve as PC is called as ___________
a) Indirection register
b) Instruction pointer
c) R-32
d) None of the mentioned
Answer: b
Clarification: The PC is used to store the next instruction that is going to be executed.
11. The IA-32 processor can switch between 16 bit operation and 32 bit operation with the help of instruction prefix bit.
a) True
b) False
Answer: a
Clarification: This switching enables a wide range of operations to be performed.
12. The Bit extension of the register is denoted with the help of __________ symbol.
a) $
b) `
c) E
d) ~
Answer: c
Clarification: This is used to extend the size of the register.
13. The instruction, ADD R1, R2, R3 is decoded as ___________
a) R1<-[R1]+[R2]+[R3]
b) R3<-[R1]+[R2]
c) R3<-[R1]+[R2]+[R3]
d) R1<-[R2]+[R3]
Answer: d
Clarification: None.
14. The instruction JG loop does ______
a) jumps to the memory location loop if the result of the most recent arithmetic op is even
b) jumps to the memory location loop if the result of the most recent arithmetic op is greater than 0
c) jumps to the memory location loop if the test condition is satisfied with the value of loop
d) none of the mentioned
Answer: b
Clarification: This instruction is used to cause a branch based on the outcome of the arithmetic operation.
15. The LEA mnemonic is used to __________
a) Load the effective address of an instruction
b) Load the values of operands onto an accumulator
c) Declare the values as global constants
d) Store the outcome of the operation at a memory location
Answer: a
Clarification: The effective address is the address of the memory location required for the execution of the instruction.